* All CB-prefixed opcodes and half of the standard opcodes (from &40 to &BF) follow a uniform layout. The exception is the HALT instruction (opcode &76), which replaces the expected LD (HL),(HL) instruction.
* RET and RETI are identical instructions. The only reason for RETI is so that some other hardware can detect the specific case of returning from the interrupt, by detecting the RETI opcode on the data bus.
* RST instructions are just a CALL instruction to a fixed address baked in the instruction itself
* Despite what the syntax of the instructions JP (HL/IX/IY) suggests, PC will be loaded with the contents of the register itself, not the indexed value. Those instructions should be understood as JP HL/IX/IY