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Gate Array

4 July 2024

Phi2x
→‎Interrupt management
10:27
+4
Phi2x
→‎Interrupt management
10:27
+4
Phi2x
→‎Interrupt management
10:25
+128
Phi2x
→‎Interrupt management
10:14
+152
Phi2x
→‎Register RMR2 (ASIC & Advanced ROM mapping)
09:29
-1
Phi2x
→‎Registers
08:21
+14
Phi2x
→‎Registers
08:19
+123
Phi2x
→‎Register RMR2 (ASIC & Advanced ROM mapping)
07:54
+35
Phi2x
→‎Summary
07:01
+1
Phi2x
→‎Summary
06:56
+3
Phi2x
→‎Summary
06:41
+41
Phi2x
→‎Register RMR2 (ASIC & Advanced ROM mapping)
06:35
-11
Phi2x
→‎Register RMR2 (ASIC & Advanced ROM mapping)
06:29
Phi2x
→‎Registers
06:22
+808
Phi2x
→‎Controlling the Gate Array
05:42
+4
Phi2x
→‎Register MMR (RAM Memory mapping)
05:41
Phi2x
→‎Register 3 - RAM Banking
05:41
+9
Phi2x
→‎Register 2 - Select screen mode and ROM configuration
05:40
+20
Phi2x
→‎Register 1 - Palette Data (Colour selection)
05:39
+29
Phi2x
→‎Registers
05:39
+1
Phi2x
→‎Registers
05:39
+9
Phi2x
→‎Registers
05:38
-13
Phi2x
→‎Controlling the Gate Array
05:36
+597
Phi2x
no edit summary
04:57
+35

2 July 2024

Phi2x
→‎CSYNC signal
15:08
+60
Phi2x
→‎Introduction
14:55
Phi2x
→‎Video memory structure
14:51
+9
Phi2x
→‎CSYNC signal
14:07
+43
Phi2x
→‎CSYNC signal
13:58
+28
Phi2x
→‎See also
13:55
+6
Phi2x
→‎Controlling the Gate Array
13:51
+6
Phi2x
no edit summary
13:51
+84

1 July 2024

Phi2x
→‎Green Screen Colours
12:50
+2
Phi2x
→‎Green Screen Colours
12:42
+493
Phi2x
→‎CSYNC signal
12:16
+61
Phi2x
→‎Register 3 - RAM Banking
11:45
+19
Phi2x
→‎CSYNC signal
11:38
+1
Phi2x
→‎CSYNC signal
11:33
+70
Phi2x
→‎CSYNC signal
11:29
+4
Phi2x
→‎CSYNC signal
11:23
+367
Phi2x
→‎CSYNC signal
10:51
+147
Phi2x
→‎CSYNC signal
10:36
+36
Phi2x
→‎CSYNC
01:30
+7
Phi2x
→‎CSYNC
01:20
+11
Phi2x
→‎CSYNC
01:19
+13
Phi2x
→‎CSYNC
01:14
+42
Phi2x
→‎CSYNC
01:10
+19
Phi2x
→‎CSYNC
01:05
-1
Phi2x
→‎CSYNC
01:04
+90
Phi2x
→‎CSYNC
00:23

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