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! Mnemonic !! Operation !! Implied !! #$nn !! $nnnn !! $nnnn,X !! $nnnn,Y !! $nn !! $nn,X !! $nn,Y !! ($nn,X) !! ($nn),Y !! N !! V !! - !! B !! D !! I !! Z !! C
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! rowspan=2| ANC Mnemonic !! rowspan=2|Operation !! colspan=10| A ∧ M → A, N → C Addressing Mode !! colspan=8|Flags !! rowspan=2| || 0B, 2B || || || || || || || || || N || - || - || - || - || - || Z || CDescription
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| ARR || ! Implied !! #$nn !! $nnnn !! $nnnn,X !! $nnnn,Y !! $nn !! $nn,X !! $nn,Y !! (A ∧ M$nn,X) / 2 → A || || 6B || || || || || || || || || !! ($nn),Y !! N || !! V || - || - || - || !! - || !! B !! D !! I !! Z || !! C
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| ASR ANC || (A ∧ M) / 2 → A , N → C || || 4B 0B, 2B || || || || || || || || || 0 N || - || - || - || - || - || Z || C|| "AND" Memory with Accumulator then Move Negative Flag to Carry Flag
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| DCP ARR || (A ∧ M - 1 ) / 2 → M, A - M || || 6B || CF || DF || DB || C7 || D7 || || C3 || D3 || N || - V || - || - || - || - || Z || C|| "AND" Accumulator then Rotate Right
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| ISC ASR || M + 1 → M, (A - ∧ M ) / 2 → A || || 4B || EF || FF || FB || E7 || F7 || || E3 || F3 || N 0 || V - || - || - || - || - || Z || C|| "AND" then Logical Shift Right
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| JAM DCP || Stop execution M - 1 → M, A - M || 02, 12, 22, 32, 42, 52, 62, 72, 92, B2, D2, F2 || || CF || DF || DB || C7 || D7 || || C3 || D3 || - N || - || - || - || - || - || - Z || -C || Decrement Memory By One then Compare with Accumulator
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| LAS ISC || M ∧ S + 1 → AM, X, S A - M → A || || || EF || FF || BB FB || E7 || F7 || || E3 || F3 || N || - V || - || - || - || - || Z || -C || Increment Memory By One then SBC then Subtract Memory from Accumulator with Borrow
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| LAX JAM || M → A, X Stop execution || 02, 12, 22, 32, 42, 52, 62, 72, 92, B2, D2, F2 || AB || AF || || BF || A7 || || B7 || A3 || B3 || N - || - || - || - || - || - || Z - || -|| Halt the CPU
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| NOP LAS || No operation || 1AM ∧ S → A, 3AX, 5A, 7A, DA, FA S || 80, 82, 89, C2, E2 || 0C || 1C, 3C, 5C, 7C, DC, FC || || 04, 44, 64 BB || 14, 34, 54, 74, D4, F4 || || || || - || N || - || - || - || - || - || - Z || -|| "AND" Memory with Stack Pointer
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| RLA LAX || C ← /M7...M0/ ← C, A ∧ M → A , X || || AB || 2F AF || 3F || 3B BF || 27 A7 || 37 || B7 || 23 A3 || 33 B3 || N || - || - || - || - || - || Z || C- || Load Accumulator and Index Register X From Memory
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| RRA NOP || C → /M7...M0/ → CNo operation || 1A, A + M + C → A 3A, 5A, 7A, DA, FA || 80, 82, 89, C2, E2 || 0C || 6F 1C, 3C, 5C, 7C, DC, FC || 7F || 7B 04, 44, 64 || 67 14, 34, 54, 74, D4, F4 || 77 || || 63 || 73 - || N - || V - || - || - || - || - || Z - || CNo Operation
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| SAX RLA || C ← /M7...M0/ ← C, A ∧ X → M → A || || || 8F 2F || 3F || 3B || 87 27 || 37 || 97 || 83 23 || 33 || - N || - || - || - || - || - || - Z || -C || Rotate Left then "AND" with Accumulator
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| SBC RRA || C → /M7...M0/ → C, A - + M - ~+ C → A || || EB || 6F || 7F || 7B || 67 || 77 || || 63 || 73 || N || V || - || - || - || - || Z || C|| Rotate Right and Add Memory to Accumulator
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| SBX SAX || (A ∧ X) - → M → X || || CB || 8F || || || 87 || || 97 || 83 || || N - || - || - || - || - || - || Z - || C- || Store Accumulator "AND" Index Register X in Memory
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| SHA SBC || A ∧ X ∧ V → - M - ~C → A || || EB || || || 9F || || || || || 93 || - N || - V || - || - || - || - || - Z || -C || Subtract Memory from Accumulator with Borrow
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| SHS SBX || (A ∧ X → S, S ∧ (H + 1) → - M → X || || CB || || || 9B || || || || || || - N || - || - || - || - || - || - Z || -C || Subtract Memory from Accumulator "AND" Index Register X
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| SHX SHA || A ∧ X ∧ (H + 1) V → M || || || || || 9E 9F || || || || || 93 || - || - || - || - || - || - || - || -|| Store Accumulator "AND" Index Register X "AND" Value
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| SHY SHS || Y A ∧ X → S, S ∧ (H + 1) → M || || || || 9C || 9B || || || || || || - || - || - || - || - || - || - || -|| Transfer Accumulator "AND" Index Register X to Stack Pointer then Store Stack Pointer "AND" Hi-Byte In Memory
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| SLO SHX || M * 2 X ∧ (H + 1) → M, A ∨ M → A || || || 0F || 1F || 1B 9E || 07 || 17 || || 03 || 13 || N - || - || - || - || - || - || Z - || - || CStore Index Register X "AND" Value
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| SRE SHY || M / 2 Y ∧ (H + 1) → M, A ⊻ M → A || || || 4F || 5F 9C || 5B || 47 || 57 || || 43 || 53 || N - || - || - || - || - || - || Z - || - || CStore Index Register Y "AND" Value
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| SLO || M * 2 → M, A ∨ M → A || || || 0F || 1F || 1B || 07 || 17 || || 03 || 13 || N || - || - || - || - || - || Z || C || Arithmetic Shift Left then "OR" Memory with Accumulator|-| SRE || M / 2 → M, A ⊻ M → A || || || 4F || 5F || 5B || 47 || 57 || || 43 || 53 || N || - || - || - || - || - || Z || C || Logical Shift Right then "Exclusive OR" Memory with Accumulator|-| XAA || (A ∨ V) ∧ X ∧ M → A || || 8B || || || || || || || || || N || - || - || - || - || - || Z || -|| Non-deterministic Operation of Accumulator, Index Register X, Memory and Bus Contents
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