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8253 chip

75 bytes removed, 10:24, 28 February 2010
/* Aleste 520EX Serial Interface and Color Palette Swap */
=== Aleste 520EX Serial Interface and Color Palette Swap ===
Also used by [[Aleste 520EX]] CPC clone:
F4X0h Aleste FABCh ExtPort: Forward PPI Port A, to 8253 Baudrate Timer 0 (RX Clock) (W) F4X1h Aleste FABDh ExtPort: Forward PPI Port A, to 8253 Baudrate Timer 1 (TX Clock) (W) F4X2h Aleste FABEh ExtPort: Forward PPI Port A, to 8253 ColorSet Timer 2 (FUTURE) (W) F4X3h Aleste FABFh ExtPort: Forward PPI Port A, to 8253 Timer 0-2 Control Registers (W)Ahhhhhhhhh, actually, above should be Port FABxh rather than F4Xxh !!! (?) Ie. first write data to F4XXh, then issue write to FABxh (with /CS and A0,A1)
Clock Input for RX/TX is 4MHz, Clock output goes to a [[8251 USART chip]],
Clock Output may be further divided by 1, 16, or 64 in the 8251 chip,
the FUTURE clock is restarted via GATE=[[CRTC]]'s "CURSOR" output,
All registers are write-only (the 8251 chips /RD is wired to VCC)
* Usage: Set PPI Port A data direction must be to output, Aleste ExtReg must enable access . Write Data to 8253PPI Port A (F4XXh), and disable access then set/clear the CS53 bit with two writes to PSGPort (FABCh+n), where n is the 8253 register index.
* Note: According to the Aleste schematic, clock input is 4MHZ (16MHZ/4), and it uses a russian 8253 clone. Not sure if that is correct...? Theoretically the 8253 supports only max 2.6MHZ, and anything faster requires a 8254, not a 8253.
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