Changes
Z80
,/* Z80 Instructions */
|-
| inc I || 11i11101 00100011 || 3 || 10 (4,6) || - || - || - || - || - || - || - || - || I += 1
|}
=== BCD group ===
{| class="wikitable" style="white-space: nowrap;"
|-
! Instruction !! Opcode !! NOPs !! Cycles !! S !! Z !! 5 !! H !! 3 !! P !! N !! C !! Effect !! Description
|-
| daa || 00100111 || 1 || 4 (4) || + || + || + || X || + || P || - || X || tmp := a,
if nf then
if hf or [a AND 0x0f > 9] then tmp -= 0x06
if cf or [a > 0x99] then tmp -= 0x60
else
if hf or [a AND 0x0f > 9] then tmp += 0x06
if cf or [a > 0x99] then tmp += 0x60
endif,
tmp => flags, cf := cf OR [a > 0x99],
hf := a.4 XOR tmp.4, a := tmp
|| Decimal Adjust Accumulator
|-
| rld || 11101101 01101111 || 5 || 18 (4,4,3,4,3) || + || + || + || 0 || + || P || 0 || - || tmp := [(hl) << 4] + [a AND 0x0f], (hl) := tmp,
a := [a AND 0xf0] + [tmp >> 8] => flags
|| Rotate Left Decimal
|-
| rrd || 11101101 01100111 || 5 || 18 (4,4,3,4,3) || + || + || + || 0 || + || P || 0 || - || tmp := (hl), (hl) := [tmp >> 4] + [[a AND 0x0f] << 4],
a := [a AND 0xf0] + [tmp AND 0x0f] => flags
|| Rotate Right Decimal
|-
| cpl || 00101111 || 1 || 4 (4) || - || - || + || 1 || + || - || 1 || - || a := ~a || Complement
|-
| neg || 11101101 01***100 || 2 || 8 (4,4) || + || + || + || + || + || V || 1 || + || a := 0 - a || Negate
|}
|-
| scf || 00110111 || 1 || 4 (4) || - || - || A || 0 || A || - || 0 || 1 || nothing else || Set Carry Flag
|}
|-
| ld sp,I || 11i11101 11111001 || 3 || 10 (4,6) || - || - || - || - || - || - || - || - || sp := I
|}
|-
| out (c),0 || 11101101 01110001 || 4 || 12 (4,4,4) || - || - || - || - || - || - || - || - || ((c)) := 0 (255 on CMOS CPU)
|}