The Z80 follows a 2-3-3 opcode bit pattern. Register instructions normally use three bits to specify the register used: 000=B, 001=C, 010=D, 011=E, 100=H, 101=L, 110=indirect through HL, 111=A. In this pattern, the two high-order bits specify the register pair, while the low order bit specifies which half of the pair to use. For example 00x is BC, 000 is B, and 001 is C.
Three bits are used to specify condition codes: 000=NZ, 001=Z, 010=NC, 011=C, 100=PO, 101=PE, 110=P, 111=M. The JR instruction only decodes the 2 lower bits of the condition code.
All CB-prefixed opcodes and half of the standard opcodes (from &40 to &BF) follow a strict uniform layout. The sole exception is the HALT instruction (opcode &76), which replaces the expected LD (HL),(HL) instruction.