Changes
Z80
,/* Oddities */
* The BIT b,(HL) instruction exposes certain bits of the internal register WZ to the undocumented flags F5 and F3.
* NMOS Z80 suffers a problem whereby LD A,I and LD A,R record the state of IFF2 after it has been reset if an interrupt is delivered during that instruction.
* Z80 is always NMOS on CPC and Plus machines[https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/z80-cpu-nmos-or-cmos/ Source].
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