Changes
PAL16L8
,/* PAL MMR register */
This register controls how the extended RAM is banked into the CPU address space. It doesn't affect the video display at all as the [[Gate Array]] can only access the Base 64k page of RAM.
{|{{Prettytable|width: 700px; font-size: 2em;}}class="wikitable"|!colspan=2|'''MMR'''||!colspan=3|'''64K page'''||'''!S'''||!colspan=2|'''MM'''||!colspan=4 style="text-align: center;"|'''CPU Memory Mapping'''
|-
|-
|1