Changes
/* Interrupt management */
In the [[KC Compact]] system, the functions of the Gate Array are "emulated" in TTL chips, [[CIO Overview|CIO]], and its color translation EPROM.
In the "cost-down" version of the CPC6128, the functions of the Gate Array are integrated into a ASIC. The Gate Array is described here is the one found in a standard CPC.
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*If the interrupts were authorized at the time of the request, then bit5 of R52 is cleared (but R52 was reset to 0 anyway) and the interrupt takes place
*If interrupts are not authorized, then the R52 counter continues to increment and the interrupt remains armed (the Gate Array then maintains its INT signal). When interrupts are enabled (using the EI instruction) and '''after the instruction that follows EI''' (so not immediately after EI), bit5 of R52 is cleared and the interrupt takes place
Note: On Amstrad Plus, the Gate Array is not the sole generator of interrupts. The 3 DMA sound channels are each able to trigger an interrupt. The ASIC also provides an interrupt vector register (IVR) for vectorized interrupts. And it offers a programmable raster interrupt register (PRI) that can be used instead of the normal raster interrupt mechanism.
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| 1 || 0 || 1 || style="text-align: center;" | n || Plus || RMR2 || ASIC & Advanced ROM mapping || Unlocked ASIC
|-
| 1 || 1 ||colspan=2 style="text-align: center;" | n || All || MMR || Memory RAM memory mapping || PAL
|}
== Registers ==
Note: The Plus palette capabilities are only accessible through the [[Default I/O Port Summary|ASIC I/O page]]. Registers PENR and INKR are not needed in that case.
=== Register PENR (Select a color register) ===
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 0 || rowspan="2" | Gate Array function "Pen Selection"PENR register
|-
| 6 || 0
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 0 || rowspan="2" | Gate Array function "Pen Selection"PENR register
|-
| 6 || 0
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=== Register 1 - Palette Data INKR (Colour selectionChange the value of the currently selected color register) ===
Once the pen has been selected its colour can then be changed. Bits 4 to 0 specify the hardware colour number from the hardware colour palette.
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 0 || rowspan="2" | Gate Array function "Colour selection"INKR register
|-
| 6 || 1
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=== Register 2 - Select screen mode and RMR (Control Interrupt counter, ROM configuration mapping and Graphics mode) ===
This is a general purpose register responsible for the [[Video modes|screen graphics mode]] and the ROM configuration.
==== Screen Graphics mode selection ====
The function of bits 1 and 0 is to define the screen mode. The settings for bits 1 and 0 and the corresponding screen mode are given in the table below.
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 1 || rowspan="2" | Gate Array functionRMR register
|-
| 6 || 0
|-
| 5 || - || not used''must be 0 on Plus machines with ASIC unlocked''
|-
| 4 || x || Interrupt generation control
| 2 || x || 1=Lower ROM area disable, 0=Lower ROM area enable
|-
| 1 || x || rowspan="2" | Screen Graphics Mode slectionselection
|-
| 0 || x
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=== Register RMR2 (ASIC & Advanced ROM mapping) === This register exists only in Plus or GX4000, and is only accessible when the ASIC is unlocked. {|{{Prettytable|width: 700px; font-size: 2em;}}|-| ''Bit'' || ''Value'' || ''Function''|-| 7 || 1 || rowspan="3 " | Gate Array RMR2 register|-| 6 || 0|-| 5 || 1|-| 4 || x || rowspan="2" |Lower ROM address and ASIC I/O page mode|-| 3 || x|-| 2 || x || rowspan="3" | Physical ROM number (0..7)|-| 1 || x|-| 0 || x|} The lower ROM address and [[Default I/O Port Summary|ASIC I/O page]] modes are: -Mode- ROM address ASIC I/O Page 00 &0000-&3FFF Disabled 01 &4000-&7FFF Disabled 10 &8000-&BFFF Disabled 11 &0000-&3FFF &4000- &7fff The physical ROMs are also accessible as upper ROMs by using the [[Upper ROM Bank Number]] port and the RMR register. <br> === Register MMR (RAM Banking memory mapping) ===
This register exists only in CPCs with 128K RAM (like the CPC 6128, or CPCs with [[Standard Memory Expansions]]). Note: In the CPC 6128, the register is a separate [[PAL16L8|PAL chip]] that assists the Gate Array chip. See its wiki page.
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 1 || rowspan="2" | Gate Array function 3MMR register
|-
| 6 || 1
|-
| 5 || b x || rowspan="3" |64K bank number (0..7); always 0 on an unexpanded CPC6128, 0-7 on [[Standard Memory Expansions]]
|-
| 4 || bx
|-
| 3 || bx
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| 2 || x || rowspan="3" | RAM Config (0..7)
To display a CPC image you will need to use a analogue monitor with a composite sync.
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=== Palette sorted by Hardware Colour Numbers ===
|-
| ''Hardware Number||Firmware Number|| ''Colour Name''
| ''R %'' || ''G %'' || ''B %'' || ''ASIC'' || ''Colour''
|-
| 0 (40h) || 13 || White || 50|| 50|| 50|| #666|| bgcolor="#808080" |
|-
| 1 (41h) || (13) || White || 50|| 50|| 50|| #666|| bgcolor="#808080" |
|-
| 2 (42h) || 19 || Sea Green || 0||100|| 50|| #0F6|| bgcolor="#00ff80" |
|-
| 3 (43h) || 25 || Pastel Yellow ||100||100|| 50|| #FF6|| bgcolor="#ffff80" |
|-
| 4 (44h) || 1 || Blue || 0|| 0|| 50|| #006|| bgcolor="#000080" |
|-
| 5 (45h) || 7 || Purple ||100|| 0|| 50|| #F06|| bgcolor="#ff0080" |
|-
| 6 (46h) || 10 || Cyan || 0|| 50|| 50|| #066|| bgcolor="#008080" |
|-
| 7 (47h) || 16 || Pink ||100|| 50|| 50|| #F66|| bgcolor="#ff8080" |
|-
| 8 (48h) || (7) || Purple ||100|| 0|| 50|| #F06|| bgcolor="#ff0080" |
|-
| 9 (49h) || (25) || Pastel Yellow ||100||100|| 50|| #FF6|| bgcolor="#ffff80" |
|-
| 10 (4Ah) || 24 || Bright Yellow ||100||100|| 0|| #FF0|| bgcolor="#ffff00" |
|-
| 11 (4Bh) || 26 || Bright White ||100||100||100|| #FFF|| bgcolor="#ffffff" |
|-
| 12 (4Ch) || 6 || Bright Red ||100|| 0|| 0|| #F00|| bgcolor="#ff0000" |
|-
| 13 (4Dh) || 8 || Bright Magenta||100|| 0||100|| #F0F|| bgcolor="#ff00ff" |
|-
| 14 (4Eh) || 15 || Orange ||100|| 50|| 0|| #F60|| bgcolor="#ff8000" |
|-
| 15 (4Fh) || 17 || Pastel Magenta||100|| 50||100|| #F6F|| bgcolor="#ff80ff" |
|-
| 16 (50h) || (1) || Blue || 0|| 0|| 50|| #006|| bgcolor="#000080" |
|-
| 17 (51h) || (19) || Sea Green || 0||100|| 50|| #0F6|| bgcolor="#00ff80" |
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| 18 (52h) || 18 || Bright Green || 0||100|| 0|| #0F0|| bgcolor="#00ff00" |
|-
| 19 (53h) || 20 || Bright Cyan || 0||100||100|| #0FF|| bgcolor="#00ffff" |
|-
| 20 (54h) || 0 || Black || 0|| 0|| 0|| #0|| bgcolor="#000000" |
|-
| 21 (55h) || 2 || Bright Blue || 0|| 0||100|| #00F|| bgcolor="#0000ff" |
|-
| 22 (56h) || 9 || Green || 0|| 50|| 0|| #060|| bgcolor="#008000" |
|-
| 23 (57h) || 11 || Sky Blue || 0|| 50||100|| #06F|| bgcolor="#0080ff" |
|-
| 24 (58h) || 4 || Magenta || 50|| 0|| 50|| #606|| bgcolor="#800080" |
|-
| 25 (59h) || 22 || Pastel Green || 50||100|| 50|| #6F6|| bgcolor="#80ff80" |
|-
| 26 (5Ah) || 21 || Lime || 50||100|| 0|| #6F0|| bgcolor="#80ff00" |
|-
| 27 (5Bh) || 23 || Pastel Cyan || 50||100||100|| #6FF|| bgcolor="#80ffff" |
|-
| 28 (5Ch) || 3 || Red || 50|| 0|| 0|| #600|| bgcolor="#800000" |
|-
| 29 (5Dh) || 5 || Mauve || 50|| 0||100|| #60F|| bgcolor="#8000ff" |
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| 30 (5Eh) || 12 || Yellow || 50|| 50|| 0|| #660|| bgcolor="#808000" |
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| 31 (5Fh) || 14 || Pastel Blue || 50|| 50||100|| #66F|| bgcolor="#8080ff" |
|}
<br>
=== Palette sorted by Firmware Colour Numbers ===
|-
| ''Firmware Number'' || ''Hardware Number'' || ''Colour Name''
| ''R %'' || ''G %'' || ''B %'' || ''ASIC'' || ''Colour''
|-
| 0|| 54h ||Black || 0|| 0|| 0|| #0||bgcolor="#000000"|
|-
| 1|| 44h (or 50h) ||Blue || 0|| 0|| 50|| #006||bgcolor="#000080"|
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| 2|| 55h ||Bright Blue || 0|| 0||100|| #00F||bgcolor="#0000ff"|
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| 3|| 5Ch ||Red || 50|| 0|| 0|| #600||bgcolor="#800000"|
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| 4|| 58h ||Magenta || 50|| 0|| 50|| #606||bgcolor="#800080"|
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| 5|| 5Dh ||Mauve || 50|| 0||100|| #60F||bgcolor="#8000ff"|
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| 6|| 4Ch ||Bright Red ||100|| 0|| 0|| #F00||bgcolor="#ff0000"|
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| 7|| 45h (or 48h) ||Purple ||100|| 0|| 50|| #F06||bgcolor="#ff0080"|
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| 8|| 4Dh ||Bright Magenta ||100|| 0||100|| #F0F||bgcolor="#ff00ff"|
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| 9|| 56h ||Green || 0|| 50|| 0|| #060||bgcolor="#008000"|
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|10|| 46h ||Cyan || 0|| 50|| 50|| #066||bgcolor="#008080"|
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|11|| 57h ||Sky Blue || 0|| 50||100|| #06F||bgcolor="#0080ff"|
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|12|| 5Eh ||Yellow || 50|| 50|| 0|| #660||bgcolor="#808000"|
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|13|| 40h (or 41h) ||White || 50|| 50|| 50||#666||bgcolor="#808080"|
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|14|| 5Fh ||Pastel Blue || 50|| 50||100|| #66F||bgcolor="#8080ff"|
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|15|| 4Eh ||Orange ||100|| 50|| 0|| #F60||bgcolor="#ff8000"|
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|16|| 47h ||Pink ||100|| 50|| 50|| #F66||bgcolor="#ff8080"|
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|17|| 4Fh ||Pastel Magenta ||100|| 50||100|| #F6F||bgcolor="#ff80ff"|
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|18|| 52h ||Bright Green || 0||100|| 0|| #0F0||bgcolor="#00ff00"|
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|19|| 42h (or 51h) ||Sea Green || 0||100|| 50|| #0F6||bgcolor="#00ff80"|
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|20|| 53h ||Bright Cyan || 0||100||100|| #0FF||bgcolor="#00ffff"|
|-
|21|| 5Ah ||Lime || 50||100|| 0|| #6F0||bgcolor="#80ff00"|
|-
|22|| 59h ||Pastel Green || 50||100|| 50|| #6F6||bgcolor="#80ff80"|
|-
|23|| 5Bh ||Pastel Cyan || 50||100||100|| #6FF||bgcolor="#80ffff"|
|-
|24|| 4Ah ||Bright Yellow ||100||100|| 0|| #FF0||bgcolor="#ffff00"|
|-
|25|| 43h (or 49h) ||Pastel Yellow ||100||100|| 50||#FF6||bgcolor="#ffff80"|
|-
|26|| 4Bh ||Bright White ||100||100||100|| #FFF||bgcolor="#ffffff"|
|}
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=== Intensities ===
* [[CPC Palette]] - some more details
On the Plus, the Amstrad engineers converted the values of the R, G, and B subcomponents to the new 12-bit palette using this 4-bit scale: * 0% became #0* 50% became #6* 100% became #F <br> === Green Screen Colours === On a green screen (where all colours are shades of unsaturated green), the colours (in BASIC colours), are in order of increasing intensity. Black is very dark, and white is bright green, and colour 13 is a medium green. (Thanks to [[Mark Rison|Mark Rison]] for this information) The luminance (Y) is not exactly correlated to the actual luminance of colour images broadcast in RGB. We have other values. Amstrad preferred to propose a completely different image system, not comparable to a conversion to monochrome, which would have limited the number of brightness levels to 21 (for example, colours 9 and 6 would have had the same luminance). They opted for a table of 27 linear brightness steps. They assigned values of 1 (1kΩ) for blue, 3 (3.3kΩ) for red, and 9 (10kΩ) for green. <br> === To calculate the colour luminance value ===
'''Red'''
100% => add 2
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