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Z80

No change in size, 21:12, 3 September 2024
/* Oddities */
== Oddities ==
* All CB-prefixed opcodes and half of the standard opcodes (from &40 to &BF) follow a uniform layout. The exception is the HALT instruction (opcode &76), which replaces the expected LD (HL), (HL) instruction.
* Despite having different names and opcodes, RETI and RETN are in fact the exact same instruction
* RST instructions are just a CALL instruction to a fixed address baked in the instruction itself
* While the syntax of ADD, ADC and SBC instructions all explicitely mention the A register, the SUB instruction does not mention it
* The 16-bit commands ADD HL,ss, ADC HL,ss and SBC HL,ss exist but not the command SUB HL,ss
* All CB-prefixed opcodes and half of the standard opcodes (from &40 to &BF) follow a uniform layout. The exception is the HALT instruction (opcode &76), which replaces the expected LD (HL), (HL) instruction.
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