Changes
CRTC
,/* MA reload */
* On CRTCs 0/1/2, if a Write Only register is read from, "0" is returned. The register accessing scheme on CRTCs 3/4 makes it impossible to happen.
* CRTC types 3 and 4 are identical in every way, except for the unlocking mechanism, split-screen , hardware soft scroll and 8-bit printer port functionalities specific to the ASIC.
* See the document "Extra CPC Plus Hardware Information" for more details.
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No matter its type, the CRTC never buffers any of its counters, except for the video pointer MA. A buffer MA' is needed because MA has to be reloaded at each raster line start.
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== = MA reload === On CRTCs 0/3/4, at the first raster line start of the frame, MA and MA' are loaded with R12/R13. On CRTC 2, at any raster line start of the frame including the first one, MA is loaded with MA'. On CRTC counter differences 1, on every raster line start of the first character line of the frame (ie. when VCC=0), MA is reloaded with R12/R13 instead of MA'. This discrepancy is a major source of incompatibility if the programmer does not take care. In demos and games, to be compatible with all CRTCs, program R12/R13 when VCC!=0. This will then take effect at the next frame start. <br>
=== VSC (C3h) overflow ===