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CRTC

241 bytes added, 6 July
/* MA reload */
* On CRTCs 0/1/2, if a Write Only register is read from, "0" is returned. The register accessing scheme on CRTCs 3/4 makes it impossible to happen.
* CRTC types 3 and 4 are identical in every way, except for the unlocking mechanism, split-screen , hardware soft scroll and 8-bit printer port functionalities specific to the ASIC.
* See the document "Extra CPC Plus Hardware Information" for more details.
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No matter its type, the CRTC never buffers any of its counters, except for the video pointer MA. A buffer MA' is needed because MA has to be reloaded at each raster line start.
The only value that is saved in a buffer in the CRTC is the video pointer MA because it is reloaded at each raster line start.<br>
R12/R13 is loaded only once per frame, in MA and MA', at the first raster line start of the frame. The == CRTC counter MA is then reloaded with the value of MA' at each raster line start. And at each new character line start, MA' captures the current value of MA.differences ==
The exception is the CRTC 1 for which === MA is reloaded at each raster line start with R12/R13 instead of MA' as long as VCCbuffering ===0.
This is a major source At the end of incompatibility if the programmer does not take care display of this discrepancythe last raster line of each character line (ie. In demos when HCC=R1 and gamesVLC=R9), to make a display compatible with all CRTCsMA' captures the current value of MA. CRTC 2 is the exception, program where MA' captures R12/R13 when VCC!=0. This will then take effect instead of MA at the next last line of the frame start.
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== = MA reload === On CRTCs 0/3/4, at the first raster line start of the frame, MA and MA' are loaded with R12/R13. On CRTC 2, at any raster line start of the frame including the first one, MA is loaded with MA'. On CRTC counter differences 1, on every raster line start of the first character line of the frame (ie. when VCC=0), MA is reloaded with R12/R13 instead of MA'. This discrepancy is a major source of incompatibility if the programmer does not take care. In demos and games, to be compatible with all CRTCs, program R12/R13 when VCC!=0. This will then take effect at the next frame start. <br>
=== VSC (C3h) overflow ===
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