Changes
/* Interrupt management */
== Interrupt management ==
Interrupts on the CPC are created by the Gate Array based on settings from the CRTC. The Gate Array has an internal counter (R52(the R is for Raster) that counts from 0 to 51, incrementing after each HSYNC signal.
R52 will return to 0 and the Gate Array will send an interrupt request on any of these conditions:
