Difference between revisions of "Default I/O Port Summary"

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This list shows only the internal standard I/O ports, as used in the BIOS ROM of the CPC 464/664/6128 BIOS, and in the AMSDOS ROM of the CPC 664/6128 and DDI-1. For a more complete list, including all Peripherals, see the [[I/O Port Summary|Complete I/O Port Summary]].
 
This list shows only the internal standard I/O ports, as used in the BIOS ROM of the CPC 464/664/6128 BIOS, and in the AMSDOS ROM of the CPC 664/6128 and DDI-1. For a more complete list, including all Peripherals, see the [[I/O Port Summary|Complete I/O Port Summary]].
  
−
== I/O Ports ==
+
<br>
  
−
{|{{Prettytable|width: 700px; font-size: 2em;}}
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== I/O Port Allocation Rules ==
−
|'''I/O'''||'''Decoded as'''||'''Port'''||'''Read'''||'''Write'''
+
 
 +
Components use partial address decoding. It is therefore possible to send the same value to different components '''simultaneously''' by carefully using custom I/O ports.
 +
 
 +
{| class="wikitable"
 +
! rowspan=2|Hardware device !! rowspan=2|Read/Write !! colspan=16|Port bits
 +
|-
 +
! b15 !! b14 !! b13 !! b12 !! b11 !! b10 !! b9 !! b8 !! b7 !! b6 !! b5 !! b4 !! b3 !! b2 !! b1 !! b0
 +
|-
 +
| [[Gate Array]] || Write only || 0 || 1 || - || - || - || - || - || - || - || - || - || - || - || - || - || -
 +
|-
 +
| [[PAL16L8|PAL]] (RAM configuration) || Write only || 0 || * || - || - || - || - || - || - || - || - || - || - || - || - || - || -
 +
|-
 +
| [[CRTC]] || Read/Write || - || 0 || - || - || - || - || r1 || r0 || - || - || - || - || - || - || - || -
 +
|-
 +
| [[Upper ROM Bank Number|Upper ROM select]] || Write only || - || - || 0 || - || - || - || - || - || - || - || - || - || - || - || - || -
 +
|-
 +
| [[Printer Port]] || Write only || - || - || - || 0 || - || - || - || - || - || - || - || - || - || - || - || -
 +
|-
 +
| [[8255|8255 PPI]] || Read/Write || - || - || - || - || 0 || - || r1 || r0 || - || - || - || - || - || - || - || -
 +
|-
 +
| Expansion Peripherals || Read/Write || - || - || - || - || - || 0 || x || x || x || x || x || x || x || x || x || x
 +
|}
 +
 
 +
Legend:
 +
*"-" means this bit is ignored,
 +
*"0" means the bit must be set to "0" for the hardware device to respond,
 +
*"1" means the bit must be set to "1" for the hardware device to respond.
 +
*"r1" and "r0" mean a bit used to define a register
 +
* "*" Bit14 of the PAL port must be at 1 on CPCs equipped with CRTCs 0/1/2. It can be at 0 or 1 on CRTCs 3/4. For compatibility reasons, it is strongly advised to always set bit14 to 1 to select PAL.
 +
 
 +
<br>
 +
 
 +
== Official I/O Ports ==
 +
 
 +
The official ports are defined to eliminate conflict between devices, as follows:
 +
 
 +
{| class="wikitable"
 +
!I/O
 +
!Decoded as
 +
!Port
 +
!Read
 +
!Write
 
|-
 
|-
 
|#7FXX||%01xxxxxx xxxxxxxx||[[Gate Array]]||-||Write
 
|#7FXX||%01xxxxxx xxxxxxxx||[[Gate Array]]||-||Write
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|#EFXX||%xxx0xxxx xxxxxxxx||[[Printer Port]]|| - ||Write
 
|#EFXX||%xxx0xxxx xxxxxxxx||[[Printer Port]]|| - ||Write
 
|-
 
|-
−
|#F4XX||%xxxx0x00 xxxxxxxx||[[8255]] PIO Port A ([[PSG]] Data)||Read||Write
+
|#F4XX||%xxxx0x00 xxxxxxxx||[[8255]] PPI Port A ([[PSG]] Data)||Read||Write
 
|-
 
|-
−
|#F5XX||%xxxx0x01 xxxxxxxx||[[8255]] PIO Port B (Vsync,[[Printer Port|PrnBusy]],Tape,etc.)||Read|| -  
+
|#F5XX||%xxxx0x01 xxxxxxxx||[[8255]] PPI Port B (Vsync,[[Printer Port|PrnBusy]],Tape,etc.)||Read|| -  
 
|-
 
|-
−
|#F6XX||%xxxx0x10 xxxxxxxx||[[8255]] PIO Port C (KeybRow,Tape,[[PSG]] Control)|| - ||Write
+
|#F6XX||%xxxx0x10 xxxxxxxx||[[8255]] PPI Port C (KeybRow,Tape,[[PSG]] Control)|| - ||Write
 
|-
 
|-
−
|#F7XX||%xxxx0x11 xxxxxxxx||[[8255]] PIO Control-Register|| - ||Write
+
|#F7XX||%xxxx0x11 xxxxxxxx||[[8255]] PPI Control-Register|| - ||Write
 
|-
 
|-
 
|#F8FF||N/A||[[Peripheral Soft Reset]] (MC_BOOT_PROGRAM and MC_START_PROGRAM do OUT [F8FF],FF)|| - ||Write
 
|#F8FF||N/A||[[Peripheral Soft Reset]] (MC_BOOT_PROGRAM and MC_START_PROGRAM do OUT [F8FF],FF)|| - ||Write
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|#FB7F||%xxxxx0x1 0xxxxxx1||[[765 FDC]] (internal) Data Register||Read||Write
 
|#FB7F||%xxxxx0x1 0xxxxxx1||[[765 FDC]] (internal) Data Register||Read||Write
 
|-
 
|-
−
|#FBDC||?||[[Amstrad Serial Interface]] 8253 Timer counter 0||Read||Write
+
|#FBDC||%xxxxx0x1 xx0xxx00||[[Amstrad Serial Interface]] 8253 Timer counter 0||Read||Write
 
|-
 
|-
−
|#FBDD||?||[[Amstrad Serial Interface]] 8253 Timer counter 1||Read||Write
+
|#FBDD||%xxxxx0x1 xx0xxx01||[[Amstrad Serial Interface]] 8253 Timer counter 1||Read||Write
 
|-
 
|-
−
|#FBDE||?||[[Amstrad Serial Interface]] 8253 Timer counter 2||Read||Write
+
|#FBDE||%xxxxx0x1 xx0xxx10||[[Amstrad Serial Interface]] 8253 Timer counter 2||Read||Write
 
|-
 
|-
−
|#FBDF||?||[[Amstrad Serial Interface]] 8253 Timer Modus Select|| - ||Write
+
|#FBDF||%xxxxx0x1 xx0xxx11||[[Amstrad Serial Interface]] 8253 Timer Modus Select|| - ||Write
 
|-
 
|-
 
|}
 
|}
  
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* The three [[765 FDC]] floppy ports are contained in CPC 664/6128/Plus and DDI-1 only.
+
* The FDC is considered as an expansion peripheral. The three [[765 FDC]] floppy ports are contained in CPC 664/6128/Plus and DDI-1 only.
  
 
* The eight [[Amstrad Serial Interface]] ports are pre-defined as shown above in the AMSDOS ROM. However, neither the CPC 664/6128/Plus nor DDI-1 do actually contain the corresponding RS232 hardware.
 
* The eight [[Amstrad Serial Interface]] ports are pre-defined as shown above in the AMSDOS ROM. However, neither the CPC 664/6128/Plus nor DDI-1 do actually contain the corresponding RS232 hardware.
  
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== Memory Mapped I/O Ports ==
+
<br>
  
−
{|{{Prettytable|width: 700px; font-size: 2em;}}
+
== Memory Mapped I/O ==
−
|'''Mem'''||'''Decoded as'''||'''Port'''||'''Read'''||'''Write'''
+
 
 +
{| class="wikitable"
 +
!Mem
 +
!Decoded as
 +
!Port
 +
!Read
 +
!Write
 
|-
 
|-
−
|#4000-7FFF||%01xxxxxx xxxxxxxx||[[ASIC]] - CPC+/GX4000 registers|| Read || Write
+
|#4000-7FFF||%01xxxxxx xxxxxxxx||ASIC - CPC+/GX4000 registers|| Read || Write
 
|-
 
|-
 
|}
 
|}
 +
 +
See the [[ASIC]] page for details.
 +
 +
<br>
  
 
[[Category:Programming]] [[Category:CPC Internal Components]]
 
[[Category:Programming]] [[Category:CPC Internal Components]]

Latest revision as of 06:23, 16 February 2025

This list shows only the internal standard I/O ports, as used in the BIOS ROM of the CPC 464/664/6128 BIOS, and in the AMSDOS ROM of the CPC 664/6128 and DDI-1. For a more complete list, including all Peripherals, see the Complete I/O Port Summary.


I/O Port Allocation Rules

Components use partial address decoding. It is therefore possible to send the same value to different components simultaneously by carefully using custom I/O ports.

Hardware device Read/Write Port bits
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Gate Array Write only 0 1 - - - - - - - - - - - - - -
PAL (RAM configuration) Write only 0 * - - - - - - - - - - - - - -
CRTC Read/Write - 0 - - - - r1 r0 - - - - - - - -
Upper ROM select Write only - - 0 - - - - - - - - - - - - -
Printer Port Write only - - - 0 - - - - - - - - - - - -
8255 PPI Read/Write - - - - 0 - r1 r0 - - - - - - - -
Expansion Peripherals Read/Write - - - - - 0 x x x x x x x x x x

Legend:

  • "-" means this bit is ignored,
  • "0" means the bit must be set to "0" for the hardware device to respond,
  • "1" means the bit must be set to "1" for the hardware device to respond.
  • "r1" and "r0" mean a bit used to define a register
  • "*" Bit14 of the PAL port must be at 1 on CPCs equipped with CRTCs 0/1/2. It can be at 0 or 1 on CRTCs 3/4. For compatibility reasons, it is strongly advised to always set bit14 to 1 to select PAL.


Official I/O Ports

The official ports are defined to eliminate conflict between devices, as follows:

I/O Decoded as Port Read Write
#7FXX %01xxxxxx xxxxxxxx Gate Array - Write
#7FXX %0xxxxxxx xxxxxxxx PAL extension to Gate Array for 128K RAM banking - Write
#BCXX %x0xxxx00 xxxxxxxx 6845 CRTC Index - Write
#BDXX %x0xxxx01 xxxxxxxx 6845 CRTC Data Out - Write
#BEXX %x0xxxx10 xxxxxxxx 6845 CRTC Status (as far as supported) Read -
#BFXX %x0xxxx11 xxxxxxxx 6845 CRTC Data In (as far as supported) Read -
#DFXX %xx0xxxxx xxxxxxxx Upper ROM Bank Number - Write
#EFXX %xxx0xxxx xxxxxxxx Printer Port - Write
#F4XX %xxxx0x00 xxxxxxxx 8255 PPI Port A (PSG Data) Read Write
#F5XX %xxxx0x01 xxxxxxxx 8255 PPI Port B (Vsync,PrnBusy,Tape,etc.) Read -
#F6XX %xxxx0x10 xxxxxxxx 8255 PPI Port C (KeybRow,Tape,PSG Control) - Write
#F7XX %xxxx0x11 xxxxxxxx 8255 PPI Control-Register - Write
#F8FF N/A Peripheral Soft Reset (MC_BOOT_PROGRAM and MC_START_PROGRAM do OUT [F8FF],FF) - Write
#FA7E %xxxxx0x0 0xxxxxxx Floppy Motor Control (for 765 FDC) - Write
#FADC %xxxxx0x0 xx0xxx00 Amstrad Serial Interface Z80-SIO / DART port A Data Register Read Write
#FADD %xxxxx0x0 xx0xxx01 Amstrad Serial Interface Z80-SIO / DART port A Control Reg. Read Write
#FADE %xxxxx0x0 xx0xxx10 Amstrad Serial Interface Z80-SIO / DART port B Data Register Read Write
#FADF %xxxxx0x0 xx0xxx11 Amstrad Serial Interface Z80-SIO / DART port B Control Reg. Read Write
#FB7E %xxxxx0x1 0xxxxxx0 765 FDC (internal) Status Register Read -
#FB7F %xxxxx0x1 0xxxxxx1 765 FDC (internal) Data Register Read Write
#FBDC %xxxxx0x1 xx0xxx00 Amstrad Serial Interface 8253 Timer counter 0 Read Write
#FBDD %xxxxx0x1 xx0xxx01 Amstrad Serial Interface 8253 Timer counter 1 Read Write
#FBDE %xxxxx0x1 xx0xxx10 Amstrad Serial Interface 8253 Timer counter 2 Read Write
#FBDF %xxxxx0x1 xx0xxx11 Amstrad Serial Interface 8253 Timer Modus Select - Write
  • The FDC is considered as an expansion peripheral. The three 765 FDC floppy ports are contained in CPC 664/6128/Plus and DDI-1 only.
  • The eight Amstrad Serial Interface ports are pre-defined as shown above in the AMSDOS ROM. However, neither the CPC 664/6128/Plus nor DDI-1 do actually contain the corresponding RS232 hardware.


Memory Mapped I/O

Mem Decoded as Port Read Write
#4000-7FFF %01xxxxxx xxxxxxxx ASIC - CPC+/GX4000 registers Read Write

See the ASIC page for details.


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