Changes
/* Some bad instruction timing analysis */
| 02 || LD (BC), A || 2 || || 3 || Fixed on r005.8.16c3
|-
| 10 || DJNZ, e || 4/3 || 4/2 || 4/2 || T States begin by "(5, " : M1 is longer than 4. Seems adding also one Wait_n in this case (as about MEM_wr)
|-
| 12 || LD (DE), A || 2 || || 3 || Fixed on r005.8.16c3
| 22 || LD (nn), HL || 5 || 4 || 6 || Fixed on r005.8.16c3
|-
| 2A || LD HL, (nn) || 5 || 4 || 4 || MEM_WR not used by here, it seems correct following doc : 4+3+3+3+3=16, 16/4=4. Damn.
|-
| 32 || LD (nn), A || 4 || || 5 || Fixed on r005.8.16c3
| C7 || RST 00h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3. T States begin by "(5, " : M1 is longer than 4.
|-
| C8 || RET z || 4/2 || 3/2 || 3/2 || RET cc, it seems correct following doc: true@5+3+3=>3*4; false@5=>2*4. Damn. T States begin by "(5, " : M1 is longer than 4.
|-
| CC || || 5/3 || 5/3 || 6/3 || Fixed on r005.8.16c3
| F4 || || 3/5 || || 3/6 || Fixed on r005.8.16c3
|-
| F5 || PUSH af || 4 || 3 || || PUSH qq, 5+3+3=11<3*4, is MEM_WR prologation effective two times here 1T+1T ? yes : pushing a register pair here, ok using MEM_wr:low
|-
| F7 || RST 30h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3
