Difference between revisions of "KDS Electronics Serial Interface"
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* [[8253 chip]] | * [[8253 chip]] | ||
| − | + | == Pictures == | |
| + | |||
| + | <gallery caption="KDS Serial Interface"> | ||
| + | Image:KDS_RS232_Top.jpg|Interface Top | ||
| + | Image:KDS_RS232_Bottom.jpg|Interface Bottom | ||
| + | Image:KDS_RS232_PCB_Top.jpg|PCB Top | ||
| + | Image:KDS_RS232_PCB_Bottom.jpg|PCB Bottom | ||
| + | </gallery> | ||
== Manual == | == Manual == | ||
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* [http://www.cpcwiki.eu/manuals/Serial%20Interface%20KDS%20Manual.en.rar Serial Interface KDS Manual] | * [http://www.cpcwiki.eu/manuals/Serial%20Interface%20KDS%20Manual.en.rar Serial Interface KDS Manual] | ||
| − | [[ | + | == Downloads == |
| + | |||
| + | * [[Media:KDS_RS232_4.2.zip|K.D.S SERIAL INTERFACE & COMMS PACK 5 v4.2]] (ROM Image) | ||
| + | * [[Media:Kds serial interface rom.zip|K.D.S SERIAL INTERFACE & COMMS PACK 5 v4.2B]] (ROM Image) | ||
| + | * [[Media:KDSCOM50.ZIP|K.D.S SERIAL INTERFACE & COMMS PACK 5 v5.0]] (ROM Image) | ||
| + | * [[Media:CAGE121.ZIP|Cage Comms v1.21 for the K.D.S. Serial Interface]] (ROM Image) | ||
| + | |||
| + | [[Category:Peripherals]] [[Category:Serial interfaces]] [[Category:Manual]] | ||
Latest revision as of 15:28, 25 October 2011
A RS232 interface by KDS Electronics.
All of them were wired incorrectly. d7 was d0, d6 was d1, and so on. Consequently you had to reverse the bit order before you could do anything useful with it.
In addition, the hardware handshaking didn't work properly, and since the ports were different to those used by the Amstrad/Pace interface, you were limited to the built-in KDS software. Which sucked.
Contents
Technical
Connects to expansion port. Contains software in ROM bank 6. Has one single 25pin DSUB connector (with TX,RX,RTS,CTS). The baudrates are generated by the 8253, and can be further divided by the 6850 (DIV1,16,64). (for example 6850=DIV1, and 8253 Counter=01A1h gives 4800 baud; 2MHz/01A1h/1).
FBE8h KDS RS232 8253 Baudrate Generator Counter 0 (RX Clock) FBE9h KDS RS232 8253 Baudrate Generator Counter 1 (TX Clock) FBEAh KDS RS232 8253 Baudrate Generator Counter 2 (not used) FBEBh KDS RS232 8253 Baudrate Generator Counter 0-2 Control Registers FBECh KDS RS232 6850 (reversed-bit-order) Control (W) FBEDh KDS RS232 6850 (reversed-bit-order) TX Data (W) FBEEh KDS RS232 6850 (reversed-bit-order) Status (R) FBEFh KDS RS232 6850 (reversed-bit-order) RX Data (R)
Caution: KDS has wired the 6850 chip's data bus incorrectly: D7 is D0, D6 is D1, etc. (so the bit order must be reversed by software). And, reportedly, the hardware handshaking doesn't work properly (no idea if that's a hardware or software glitch, or maybe the 6850's 1-stage RXFIFO is just too small for high baudrates?).
Pictures
- KDS Serial Interface
Interface Top
Interface Bottom
PCB Top
PCB Bottom
Manual
Downloads
- K.D.S SERIAL INTERFACE & COMMS PACK 5 v4.2 (ROM Image)
- K.D.S SERIAL INTERFACE & COMMS PACK 5 v4.2B (ROM Image)
- K.D.S SERIAL INTERFACE & COMMS PACK 5 v5.0 (ROM Image)
- Cage Comms v1.21 for the K.D.S. Serial Interface (ROM Image)
