Changes related to "Gate Array and ASIC Pin-Outs"
This is a list of changes made recently to pages linked from a specified page (or to members of a specified category). Pages on your watchlist are bold.
4 July 2024
| 09:21 | Gate Array (19 changes | history) . . (+1,705) . . [Phi2x (19×)] | |
| 09:21 (cur | prev) . . (+14) . . Phi2x (Talk | contribs) (→Registers) | ||
| 09:19 (cur | prev) . . (+123) . . Phi2x (Talk | contribs) (→Registers) | ||
| 08:54 (cur | prev) . . (+35) . . Phi2x (Talk | contribs) (→Register RMR2 (ASIC & Advanced ROM mapping)) | ||
| 08:01 (cur | prev) . . (+1) . . Phi2x (Talk | contribs) (→Summary) | ||
| 07:56 (cur | prev) . . (+3) . . Phi2x (Talk | contribs) (→Summary) | ||
| 07:41 (cur | prev) . . (+41) . . Phi2x (Talk | contribs) (→Summary) | ||
| 07:35 (cur | prev) . . (-11) . . Phi2x (Talk | contribs) (→Register RMR2 (ASIC & Advanced ROM mapping)) | ||
| 07:29 (cur | prev) . . (0) . . Phi2x (Talk | contribs) (→Register RMR2 (ASIC & Advanced ROM mapping)) | ||
| 07:22 (cur | prev) . . (+808) . . Phi2x (Talk | contribs) (→Registers) | ||
| 06:42 (cur | prev) . . (+4) . . Phi2x (Talk | contribs) (→Controlling the Gate Array) | ||
| 06:41 (cur | prev) . . (0) . . Phi2x (Talk | contribs) (→Register MMR (RAM Memory mapping)) | ||
| 06:41 (cur | prev) . . (+9) . . Phi2x (Talk | contribs) (→Register 3 - RAM Banking) | ||
| 06:40 (cur | prev) . . (+20) . . Phi2x (Talk | contribs) (→Register 2 - Select screen mode and ROM configuration) | ||
| 06:39 (cur | prev) . . (+29) . . Phi2x (Talk | contribs) (→Register 1 - Palette Data (Colour selection)) | ||
| 06:39 (cur | prev) . . (+1) . . Phi2x (Talk | contribs) (→Registers) | ||
| 06:39 (cur | prev) . . (+9) . . Phi2x (Talk | contribs) (→Registers) | ||
| 06:38 (cur | prev) . . (-13) . . Phi2x (Talk | contribs) (→Registers) | ||
| 06:36 (cur | prev) . . (+597) . . Phi2x (Talk | contribs) (→Controlling the Gate Array) | ||
| 05:57 (cur | prev) . . (+35) . . Phi2x (Talk | contribs) |
| 06:44 | PAL16L8 (diff | hist) . . (0) . . Phi2x (Talk | contribs) (→PAL I/O port) |
