Changes

Jump to: navigation, search

Aleste 520EX

83 bytes added, 13:49, 4 February 2010
/* Technical */
|'''I/O'''||'''Decoded as'''||'''Port'''||'''Read'''||'''Write'''
|-
|#7CXX||%0xxxxx00 xxxxxxxx||Aleste RAM Mapper page 0 (note 1)]||Read||Write
|-
|#7DXX||%0xxxxx01 xxxxxxxx||Aleste RAM Mapper page 1 (note 1)||Read||Write
|-
|#7EXX||%0xxxxx10 xxxxxxxx||Aleste RAM Mapper page 2 (note 1)||Read||Write
|-
|#7FXX||%0xxxxx11 xxxxxxxx||Aleste RAM Mapper page 3 (note 1)||Read||Write
|-
|#7FXX||%0xxxxxxx xxxxxxxx||Aleste "Customized [[Gate Array" ]] (note 3Aleste Multiport)]||-||Write
|-
|#BCXX||%x0xxxx00 xxxxxxxx||6845 [[CRTC]] Index|| - ||Write
|#BFXX||%x0xxxx11 xxxxxxxx||6845 [[CRTC]] Data In (as far as supported)||Read|| -
|-
|#DFXX||%xx0xxxxx xxxxxxxx||[[Upper ROM Bank Number (note 9)]]|| - ||Write
|-
|#F4XX||%xxxx0x00 xxxxxxxx||[[8255]] PIO Port A (PSG/8253 Timer/Real-Time Clock data)||Read||Write
|#FA7E||%xxxxx0x0 0xxxxxxx||Floppy Motor Control (for [[765 FDC]])|| - ||Write
|-
|#FABF||%xxxxx0x0 1xxxxxxx||Aleste EXTPORT (note 10)|| - ||Write
|-
|#FB7E||%xxxxx0x1 0xxxxxx0||[[765 FDC]] (internal) Status Register||Read|| -
|}
1. Bits 7 and 6 of the data must be 1 for mapper== Aleste RAM Mapper ==
2.Bits 7 and 6 of the data must be 1 for mapper == Aleste 8bit Printer Port == Printer data-bits are connected to AY I/O port B(PSG register 15).
Printer strobe is connected to 8255 port C bit 4. The strobe is negated by the hardware.
Printer busy is connected to 8255 port B bit 6.
6,388
edits