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/* Introduction */
In the CPC+ system, the functions of the Gate-Array are integrated into a single [[ASIC|ASIC]]. When the ASIC is "locked", the extra features are not available and the ASIC operates the same as the Gate-Array in the CPC allowing programs written for the CPC to work on the Plus without modification. The ASIC must be "un-locked" to access the new features.
In the [[KC Compact]] system, the functions of the Gate-Array are "emulated" in TTL chips, [[TTL logicCIO Overview|TTL logicCIO]] , and by the [[CIO]]its color translation EPROM.
In the "cost-down" version of the CPC6128, the functions of the Gate-Array are integrated into a ASIC.
