Changes
MOS 6502
,/* Illegal instructions */
|| || || || - || - || - || - || - || - || - || No operation || No Operation
|-
| RLA || || || 2F (6) || 3F (7) || 3B (7) || 27 (5) || 37 (6) || || 23 (8) || 33 (8) || N || - || - || - || - || Z || C || CF ← /M7...M0/ ← CFM = C <- [76543210] <- C, A ∧ AND M → -> A || Rotate Left then "ROL oper + AND" with Accumulatoroper
|-
| RRA || || || 6F (6) || 7F (7) || 7B (7) || 67 (5) || 77 (6) || || 63 (8) || 73 (8) || N || V || - || - || - || Z || C || CF → /M7...M0/ → CFM = C -> [76543210] -> C, A + M + CF → C -> A , C || Rotate Right and Add Memory to AccumulatorROR oper + ADC oper
|-
| SAX (AXS, AAX) || || || 8F (4) || || || 87 (3) || || 97 (4) || 83 (6) || || - || - || - || - || - || - || - || A ∧ AND X → -> M || Store Accumulator "Stores the bitwise AND" Index Register of A and X in Memory
|-
| SBC (USBC) || || EB (2) || || || || || || || || || N || V || - || - || - || Z || C || A - M - ~CF → A || Subtract Memory from Accumulator with Borrow
| SRE (LSE) || || || 4F (6) || 5F (7) || 5B (7) || 47 (5) || 57 (6) || || 43 (8) || 53 (8) || N || - || - || - || - || Z || C || M / 2 → M, A ⊻ M → A || Logical Shift Right then "Exclusive OR" Memory with Accumulator
|}
A lot of these illegal instructions involve a bitwise AND operation, which is a side effect of the open-drain behavior of NMOS logic. When two instructions put a value into a temporary register inside the 6502 core called "special bus", this creates a bus conflict, and the lower voltage wins because transistors can pull down stronger than resistors can pull up.
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