Changes
/* NMOS 6502 Instruction Set */
== NMOS 6502 Instruction Set ==
Cycles are shown in parenthesis for each opcode. p=1 if page is crossed. t=1 if branch is taken.
=== ALU instructions ===
{| class="wikitable" style="white-space: nowrap;"
| ASL || || 0A (2) || || 0E (6) || 1E (7) || || || 06 (5) || 16 (6) || || || || || N || - || - || - || - || Z || C || CF ← /M<sub>7</sub>...M<sub>0</sub>/ ← 0 || Arithmetic Shift Left
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| BCC |CMP | || || |C9 (2) | |CD (4) | |DD (4+p) | |D9 (4+p) | || |C5 (3) | |D5 (4) | || |C1 (6) | || 90 D1 (2+t5+p) || - || - N || - || - || - || - || - Z || Branch on CF = 0 C || A - M || Branch on Carry ClearCompare Memory and Accumulator
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| BCS CPX || || || E0 (2) || EC (4) || || || || E4 (3) || || || || || B0 (2+t+p) || - N || - || - || - || - || - Z || - C || Branch on CF = 1 X - M || Branch on Carry SetCompare Index Register X To Memory
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| BEQ CPY || || || C0 (2) || CC (4) || || || || C4 (3) || || || || || F0 (2+t+p) || - N || - || - || - || - || - Z || - C || Branch on ZF = 1 Y - M || Branch on Result ZeroCompare Index Register Y To Memory
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| BIT DEC || || || || 2C CE (46) || DE (7) || || || 24 C6 (35) || D6 (6) || || || || || N || V - || - || - || - || Z || - || A ∧ M, M<sub>7</sub> - 1 → NF, M<sub>6</sub> → VF || Test Bits in Decrement Memory with AccumulatorBy One
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| BMI DEX || CA (2) || || || || || || || || || || || || 30 (2+t+p) || - N || - || - || - || - || - Z || - || Branch on NF = X - 1 → X || Branch on Result MinusDecrement Index Register X By One
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| BNE DEY || 88 (2) || || || || || || || || || || || || D0 (2+t+p) || - N || - || - || - || - || - Z || - || Branch on ZF = 0 Y - 1 → Y || Branch on Result Not ZeroDecrement Index Register Y By One
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| BPL EOR || || || 49 (2) || 4D (4) || 5D (4+p) || 59 (4+p) || || 45 (3) || 55 (4) || || 41 (6) || || 10 51 (2+t5+p) || - || - N || - || - || - || - || Z || - || Branch on NF = 0 A ⊻ M → A || Branch on Result Plus"Exclusive OR" Memory with Accumulator
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| BRK INC || 00 (7) || || || EE (6) || FE (7) || || || E6 (5) || F6 (6) || || || || || - N || - || 1 - || - || 1 - || - Z || - || PC M + 2↓, [FFFE] → PCL, [FFFF] 1 → PCH M || Force InterruptIncrement Memory By One
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| BVC INX || E8 (2) || || || || || || || || || || || || 50 (2+t+p) || - N || - || - || - || - || - Z || - || Branch on VF = 0 X + 1 → X || Branch on Overflow ClearIncrement Index Register X By One
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| BVS INY || C8 (2) || || || || || || || || || || || || 70 (2+t+p) || - N || - || - || - || - || - Z || - || Branch on VF = Y + 1 → Y || Branch on Overflow SetIncrement Index Register Y By One
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| CLC LSR || 18 || 4A (2) || || 4E (6) || 5E (7) || || || 46 (5) || 56 (6) || || || || || 0 || - || - || - || - || - Z || - C || 0 || → /M<sub>7</sub>...M<sub>0 </sub>/ → CF || Clear Carry FlagLogical Shift Right
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| CLD ORA || D8 || || 09 (2) || 0D (4) || 1D (4+p) || 19 (4+p) || || 05 (3) || 15 (4) || || 01 (6) || 11 (5+p) || || || N || - || - || - || 0 || - || - Z || - || 0 A ∨ M → DF A || Clear Decimal Mode"OR" Memory with Accumulator
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| CLI ROL || 58 || 2A (2) || || 2E (6) || 3E (7) || || || 26 (5) || 36 (6) || || || || || N || - || - || - || - || 0 Z || - || - C || CF ← /M<sub>7</sub>...M<sub>0 → IF </sub>/ ← CF || Clear Interrupt DisableRotate One Bit Left (Memory or Accumulator)
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| CLV ROR || B8 || 6A (2) || || 6E (6) || 7E (7) || || || 66 (5) || 76 (6) || || || || || N || - || 0 || - || - || - || - Z || - C || CF → /M<sub>7</sub>...M<sub>0 </sub>/ → VF CF || Clear Overflow FlagRotate One Bit Right (Memory or Accumulator)
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| CMP SBC || || || C9 E9 (2) || CD ED (4) || DD FD (4+p) || D9 F9 (4+p) || || C5 E5 (3) || D5 F5 (4) || || C1 E1 (6) || D1 F1 (5+p) || || N || - V || - || - || - || Z || C || A - M - (1 - CF) → A || Compare Subtract Memory and from Accumulatorwith Borrow|} === Move instructions === {| class="wikitable" style="white-space: nowrap;"
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! rowspan=2| CPX Mnemonic !! colspan=12|Addressing Modes !! colspan=7| Flags !! rowspan=2|| || E0 (Operation !! rowspan=2) || EC (4) || || || || E4 (3) || || || || || || N || - || - || - || - || Z || C || X - M || Compare Index Register X To MemoryDescription
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| DEC LDA || || A9 (2) || AD (4) || CE BD (64+p) || DE B9 (74+p) || || || C6 A5 (53) || D6 B5 (64) || || A1 (6) || B1 (5+p) || || N || - || - || - || - || Z || - || M - 1 → M A || Decrement Load Accumulator with Memory By One
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| DEX LDX || CA || A2 (2) || AE (4) || || BE (4+p) || || A6 (3) || || || || B6 (4) || || || || N || - || - || - || - || Z || - || X - 1 M → X || Decrement Load Index Register X By OneFrom Memory
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| DEY LDY || 88 || A0 (2) || AC (4) || BC (4+p) || || || A4 (3) || || || B4 (4) || || || || || N || - || - || - || - || Z || - || Y - 1 M → Y || Decrement Load Index Register Y By OneFrom Memory
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| EOR PHA || 48 (3) || || 49 (2) || 4D (4) || 5D (4+p) || 59 (4+p) || || 45 (3) || 55 (4) || || 41 (6) || 51 (5+p) || - || N - || - || - || - || - || Z || - || A ⊻ M → A A↓ || "Exclusive OR" Memory with Push AccumulatorOn Stack
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| INC PHP || 08 (3) || || || EE (6) || FE (7) || || || E6 (5) || F6 (6) || || || || - || N - || - 1 || - || - || - || Z || - || M + 1 → M P↓ || Increment Memory By OnePush Processor Status on Stack
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| INX PLA || E8 68 (24) || || || || || || || || || || || || || N || - || - || - || - || Z || - || X + 1 (S)↑ → X A || Increment Index Register X By OnePull Accumulator From Stack
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| INY PLP || C8 28 (24) || || || || || || || || || || || || || N || - V || - || - D || - I || Z || - C || Y + 1 (S)↑ → Y P || Increment Index Register Y By OnePull Processor Status From Stack
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| JMP STA || || || 8D (4) || 4C 9D (35) || 99 (5) || || 6C 85 (53) || 95 (4) || || 81 (6) || || 91 (6) || || - || - || - || - || - || - || - || [PC + 1] → PCL, [PC + 2] A → PCH M || JumpStore Accumulator in Memory
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| JSR STX || || || || 20 8E (64) || || || || 86 (3) || || 96 (4) || || || || - || - || - || - || - || - || - || PC + 2↓, [PC + 1] → PCL, [PC + 2] X → PCH M || Jump To SubroutineStore Index X in Memory
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| LDA STY || || || A9 (2) || AD 8C (4) || BD (4+p) || B9 (4+p) || || A5 84 (3) || B5 94 (4) || || A1 (6) || B1 (5+p) || || N - || - || - || - || - || Z - || - || M Y → A M || Load Accumulator with Store Index Y in Memory
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| LDX TAX || || || A2 AA (2) || AE (4) || || BE (4+p) || || A6 (3) || || B6 (4) || || || || || N || - || - || - || - || Z || - || M A → X || Load Transfer Accumulator to Index Register X From Memory
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| LDY TAY || || || A0 A8 (2) || AC (4) || BC (4+p) || || || A4 (3) || B4 (4) || || || || || || N || - || - || - || - || Z || - || M A → Y || Load Transfer Accumulator to Index Register Y From Memory
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| LSR TSX || || 4A BA (2) || || 4E (6) || 5E (7) || || || 46 (5) || 56 (6) || || || || || 0 N || - || - || - || - || Z || C - || 0 → /M<sub>7</sub>...M<sub>0</sub>/ S → CF X || Logical Shift RightTransfer Stack Pointer to Index X
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| NOP TXA || EA 8A (2) || || || || || || || || || || || || N || - || - || - || - || - || - Z || - || No operation X → A || No OperationTransfer Index X to Accumulator
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| ORA TXS || || || 09 9A (2) || 0D (4) || 1D (4+p) || 19 (4+p) || || 05 (3) || 15 (4) || || 01 (6) || 11 (5+p) || || N || - || - || - || - || Z - || - || - || A ∨ M X → A S || "OR" Memory with AccumulatorTransfer Index X to Stack Pointer
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| PHA TYA || 48 98 (32) || || || || || || || || || || || || N || - || - || - || - || - Z || - || - Y → A || A↓ Transfer Index Y to Accumulator|} === Jump and Flag instructions === {| Push Accumulator On Stackclass="wikitable" style="white-space: nowrap;"
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! rowspan=2| PHP Mnemonic !! colspan=12|Addressing Modes !! colspan=7| 08 (3) Flags !! rowspan=2|Operation !! rowspan=2| || || || || || || || || || || || || - || - || 1 || - || - || - || - || P↓ || Push Processor Status on StackDescription
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| PLP BCC || 28 (4) || || || || || || || || || || || 90 (2+t+p) || - || N - || V - || - || D - || I - || Z - || C || (S)↑ → P Branch on CF = 0 || Pull Processor Status From StackBranch on Carry Clear
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| ROL BCS || || 2A (2) || || 2E (6) || 3E (7) || || || 26 (5) || 36 (6) || || || B0 (2+t+p) || - || N - || - || - || - || - || Z || C - || Branch on CF ← /M<sub>7</sub>...M<sub>0</sub>/ ← CF = 1 || Rotate One Bit Left (Memory or Accumulator)Branch on Carry Set
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| ROR BEQ || || 6A (2) || || 6E (6) || 7E (7) || || || 66 (5) || 76 (6) || || || F0 (2+t+p) || - || N - || - || - || - || - || Z - || C Branch on ZF = 1 || CF → /M<sub>7</sub>...M<sub>0</sub>/ → CF || Rotate One Bit Right (Memory or Accumulator)Branch on Result Zero
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| RTI || 40 (6) BIT || || || 2C (4) || || || || 24 (3) || || || || || || N || V || - || D - || I - || Z || C - || (S)↑ → PA ∧ M, (S)↑ M<sub>7</sub> → PCLNF, (S)↑ M<sub>6</sub> → PCH VF || Return From InterruptTest Bits in Memory with Accumulator
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| RTS || 60 (6) BMI || || || || || || || || || || || || 30 (2+t+p) || - || - || - || - || - || - || - || (S)↑ → PCL, (S)↑ → PCH, PC + Branch on NF = 1 → PC || Return From SubroutineBranch on Result Minus
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| SBC BNE || || || E9 (2) || ED (4) || FD || || || || || || || D0 (42+t+p) || F9 - || - || - || - || - || - || - || Branch on ZF = 0 || Branch on Result Not Zero|-| BPL || || || || || || || || || || || || 10 (42+t+p) || - || E5 (3) - || F5 (4) - || - || - || - || - || Branch on NF = 0 || Branch on Result Plus|-| BRK || E1 00 (67) || F1 || || || || || || || || || || || - || - || 1 || - || 1 || - || - || PC + 2↓, [FFFE] → PCL, [FFFF] → PCH || Force Interrupt|-| BVC || || || || || || || || || || || || 50 (52+t+p) || - || N - || V - || - || - || - || Z - || C Branch on VF = 0 || A - M Branch on Overflow Clear|- | BVS || || || || || || || || || || || || 70 (1 - CF2+t+p) → A || Subtract Memory from Accumulator with Borrow- || - || - || - || - || - || - || Branch on VF = 1 || Branch on Overflow Set
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| SEC CLC || 38 18 (2) || || || || || || || || || || || || || - || - || - || - || - || - || 1 0 || 1 0 → CF || Set Clear Carry Flag
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| SED CLD || F8 D8 (2) || || || || || || || || || || || || || - || - || - || 1 0 || - || - || - || 1 0 → DF || Set Clear Decimal Mode
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| SEI CLI || 78 58 (2) || || || || || || || || || || || || || - || - || - || - || 1 0 || - || - || 1 0 → IF || Set Clear Interrupt Disable
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| STA CLV || B8 (2) || || || 8D (4) || 9D (5) || 99 (5) || || 85 (3) || 95 (4) || || 81 (6) || 91 (6) || || - || - 0 || - || - || - || - || - || A 0 → M VF || Store Accumulator in MemoryClear Overflow Flag
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| STX JMP || || || || 8E 4C (43) || || || || 86 6C (35) || || 96 (4) || || || || || - || - || - || - || - || - || - || X [PC + 1] → PCL, [PC + 2] → M PCH || Store Index X in MemoryJump
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| STY JSR || || || || 8C 20 (46) || || || || 84 (3) || 94 (4) || || || || || - || - || - || - || - || - || - || Y PC + 2↓, [PC + 1] → PCL, [PC + 2] → M PCH || Store Index Y in MemoryJump To Subroutine
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| TAX NOP || AA EA (2) || || || || || || || || || || || || || N - || - || - || - || - || Z - || - || A → X No operation || Transfer Accumulator to Index XNo Operation
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| TAY RTI || A8 40 (26) || || || || || || || || || || || || || N || - V || - || - D || - I || Z || - C || A (S)↑ → P, (S)↑ → PCL, (S)↑ → Y PCH || Transfer Accumulator to Index YReturn From Interrupt
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| TSX RTS || BA 60 (26) || || || || || || || || || || || || - || N - || - || - || - || - || Z || - || (S )↑ → PCL, (S)↑ → PCH, PC + 1 → X PC || Transfer Stack Pointer to Index XReturn From Subroutine
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| TXA SEC || 8A 38 (2) || || || || || || || || || || || || - || N - || - || - || - || - || Z || - 1 || X 1 → A CF || Transfer Index X to AccumulatorSet Carry Flag
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| TXS SED || 9A F8 (2) || || || || || || || || || || || || || - || - || - || - 1 || - || - || - || X 1 → S DF || Transfer Index X to Stack PointerSet Decimal Mode
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| TYA SEI || 98 78 (2) || || || || || || || || || || || || - || N - || - || - || - 1 || - || Z || - || Y 1 → A IF || Transfer Index Y to AccumulatorSet Interrupt Disable
|}
