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CRTC

810 bytes added, 14 November
/* CRTC registers */
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On CRTCs 0/2, registers 18-31 read as 0.=== Register access ===
On CRTCs 0/1/2, only the 5 least significant bits of the selected register number are considered to read a register: * For instance, reading register 0 will give the same result as reading register 32 or 64.* On CRTCs 0/2, registers 18-31 read as 0.* On CRTC 1, registers 18-30 read as 0, register 31 reads as 0xff&FF. On CRTCs 3/4, only the 3 least significant bits of the selected register number are considered to read a register, according to the following table: {| class="wikitable"!Nb!Register!Definition|-|0||R16||Light Pen Address (High)|-|1||R17||Light Pen Address (Low)|-|2||R10||Cursor Start Raster|-|3||R11||Cursor End Raster|-|4||R12||Display Start Address (High)|-|5||R13||Display Start Address (Low)|-|6||R14||Cursor Address (High)|-|7||R15||Cursor Address (Low)|} For instance, reading register 4 will give the same result as reading register 12 or 20.
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