Changes

*🔥[https://www.cpc-power.com/index.php?page=database&lemot=raxoft Raxoft tests] (CPC port of [https://github.com/raxoft/z80test z80test] with [https://github.com/redcode/Z80/wiki/Zilog-Z80-CPU-Test-Suite official results]) [https://github.com/SingleStepTests SingleStepTests] [https://www.cpc-power.com/index.php?page=detail&num=6346 ZEX] Z80 CPU instruction set exercisers

*[https://www.cpc-power.com/index.php?page=detail&num=298 Arkanoid] [https://www.cpc-power.com/index.php?page=detail&num=460 Boulder Dash] [https://www.cpc-power.com/index.php?page=detail&num=1006 The Great Escape] Using Z80 Interrupt Mode 2 [https://www.cpc-power.com/index.php?page=detail&num=2280 Trailblazer (using HALT)] [https://www.cpc-power.com/index.php?page=detail&num=427 L'anneau de Zengara (using Z80 register R)] [https://www.cpc-power.com/index.php?page=detail&num=1299 Light Corridor (Z80 useless instruction prefixes)] [https://www.cpc-power.com/index.php?page=detail&num=735 Dogsbody (accessing non-standard I/O ports)] [https://youtu.be/UVNUD9qRbSI Pinball Dreams (Z80 NMOS only)]

*[https://floooh.github.io/2021/12/06/z80-instruction-timing.html Z80 T-state timings] [https://floooh.github.io/2021/12/17/cycle-stepped-z80.html] [https://baltazarstudios.com/zilog-z80-undocumented-behavior/ Other source about T-state timings] Ultra accurate timing behaviour [https://www.cpc-power.com/cpcarchives/index.php?page=articles&num=48 I/O port allocation] [https://www.grimware.org/doku.php/documentations/devices/gatearray RAM/ROM mapping] Technical documentation