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6502

63 bytes removed, 5 September
/* IRQ / NMI / BRK / RESET */
The priority sequence for interrupts, from top priority to bottom, is as follows: RESET, BRK, NMI, IRQ. [https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf Source at chapter 7.19]
On NMOS, the simultaneous assertion NMI or IRQ that happens during specific moments of a hardware interrupt line and BRK execution of BRK was not accounted for in the design — the can cause BRK instruction will to be ignored in such a caseeffectively skipped. On CMOS, this situation is correctly handled by executing BRK and then servicing the interrupt.
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