Changes
CRTC
,/* HSYNC and VSYNC */
== HSYNC and VSYNC ==
The HSYNC and VSYNC signals from the CRTC are not directly connected to the display. They are passed to the [[Gate Array]] for further modification. See its wiki page.
=== HSYNC ===
Bit0 of port B of the PPI is directly connected to the VSYNC pin of the CRTC.
On CRTCs 3/4, HSYNC occurs 1µs later than on CRTCs 0/1/2.
=== VSYNC ===
CRTCs 1/2 have a fixed VSYNC width value of 16. VSYNC width can be configured with R3 on CRTCs 0/3/4. If 0 is programmed this gives 16 lines of VSYNC.
On all CRTCs, a new VSYNC cannot be triggered if VSC!=0. So we cannot trigger a new VSYNC during a VSYNC. The same goes for HSYNC.
On CRTC 2, if a VSYNC is triggered during an HSYNC, the CRTC produces a ghost VSYNC. The CRTC then counts the lines as if a VSYNC were taking place by preventing a new VSYNC from occurring, but without the VSYNC pin being enabled.
