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/* Misc registers */
However, I found that with this bit set to 0, there is a bug.
Example showing bug: [ [http://www.cpctech.org.uk/source/asicbug.html highlighted] | [http://www.cpctech.org.uk/source/asicbug.asm original] ]
A demo program used a single DMA channel to issue an interrupt, a few lines later a raster interrupt would issue an interrupt. The first interrupt executed the correct interrupt handler routine (0,2 or 4), the second executed the interrupt handler for vector of 0 (the raster interrupt is vector 6). This was clearly wrong! My advice is that you should not use the automatic interrupt clear feature.
