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CRTC

72 bytes added, 4 July
/* CRTC register differences */
'''Notes'''
* On types CRTCs 0 and /1/2, if a Write Only register is read from, "0" is returned. The register accessing scheme on CRTCs 3/4 makes it impossible to happen.
* CRTC types 3 and 4 are identical in every way, except for the unlocking mechanism, split-screen and 8-bit printer port functionalities specific to the ASIC.
* See the document "Extra CPC Plus Hardware Information" for more details.
 
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=== Reading from CRTC registers on ASIC/Pre-ASIC ===
 
On CRTCs 3/4, only the 3 least significant bits of the selected register number are considered to read a register according to the following table:
 
{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Nb'''||'''Register'''||'''Definition'''
|-
|0||R16||Light Pen Address (High)
|-
|1||R17||Light Pen Address (Low)
|-
|2||R10||Cursor Start Raster
|-
|3||R11||Cursor End Raster
|-
|4||R12||Display Start Address (High)
|-
|5||R13||Display Start Address (Low)
|-
|6||R14||Cursor Address (High)
|-
|7||R15||Cursor Address (Low)
|}
 
Therefore, as an example, reading register 4 will give the same result as reading register 12 or 20.
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|(C9=R9 and C0=R0) or (C9=0 and C0=0 to R0-1)
|}
 
<br>
 
=== Reading from CRTC registers on ASIC/Pre-ASIC ===
 
On CRTCs 3/4, only the 3 least significant bits of the selected register number are considered to read a register according to the following table:
 
{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Nb'''||'''Register'''||'''Definition'''
|-
|0||R16||Light Pen Address (High)
|-
|1||R17||Light Pen Address (Low)
|-
|2||R10||Cursor Start Raster
|-
|3||R11||Cursor End Raster
|-
|4||R12||Display Start Address (High)
|-
|5||R13||Display Start Address (Low)
|-
|6||R14||Cursor Address (High)
|-
|7||R15||Cursor Address (Low)
|}
 
Therefore, as an example, reading register 4 will give the same result as reading register 12 or 20.
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9,001
edits