Changes

The DISPTMG signal is composited from its 3 internal subcomponents: HBORDER (Horizontal), VBORDER (Vertical), IBORDER (Immediate) by using the NOR function. DISPTMG can be immediately forced to 0 by using R8 (DISPTMG Skew) on type CRTCs 0,/3 and /4 or by setting R6=0 on type CRTC 1. It is not possible to force the DISPTMG on type CRTC 2.

== The 6845 Registers CRTC registers ==

On CRTCs 0/2, registers 18-31 read as 0, on type 0 and 2. On CRTC 1, registers 18-30 read as 0 on type1, register 31 reads as 0xff.

== CRTC Differences register differences == In this section I will attempt to identify all the differences between each CRTC.

=== R31 on Type 1 Vertical Displayed (R6) ===

R31 On CRTCs 0/1/2, the condition VCC=R6 is considered immediately to activate the VBORDER. The only exception is described in for CRTC 1 with a value of 0, which triggers an immediate BORDER without the UM6845R documentation as "Dummy Register"condition VCC=R6 being required.

Its use is described in the documentation for the Rockwell R6545 in combination with R18On CRTCs 3/4, R19 and R8 and the Status Registercondition VCC=R6 is tested only at new character line start. In The update of R6 during the UM6845R it appears to have no effect. Reading and writing does nothing. Reading it returns 0x0ff. R31 doesn't exist on types 0,2,3,4character line is therefore not considered.

=== R12/R13 R31 on Type 1 ===

The UM6845R differs to other CRTC R31 is described in respect of R12/R13the UM6845R documentation as "Dummy Register".

When VCC=0, R12/R13 Its use is re-read at described in the start of each line. R12/R13 can therefore be changed documentation for each scanline when VCC=0the Rockwell R6545 in combination with R18, R19 and R8 and the Status Register.

Just like other CRTCs when RC==(R9-1), In the current MA is captured for the next char-lineUM6845R it appears to have no effect. Reading and writing does nothing. Reading it returns 0x0ff.

In demos to make a display compatible with all R31 doesn't exist on CRTCs, program R12/R13 when VCC!=0. This will then take effect at the next frame start/2/3/4.

The cursor raster registers R10/R11 act as status registers when read on Types CRTCs 3 & /4. They behave as normal cursor raster registers upon write.

On CRTC Types CRTCs 3 and /4, only the 3 least significant bits of the selected register number are considered to read a register according to the following table:

The only value that is saved in a buffer in the CRTC is the video pointer MA because it is reloaded at each raster line start. The exception is the CRTC 1 for which the MA is reloaded with R12/R13 instead of MA' as long as C4=0.

<br> === HSC (C3l) overflow ===R12/R13 is loaded only once per frame, in MA and MA', at the first raster line start of the frame. The counter MA is then reloaded with the value of MA' at each raster line start. And at each new character line start, MA' captures the current value of MA.

During an HSYNC, if HSYNC Width (R3l) The exception is changed with a value less than the current HSC, then HSC overflows and will continue to count up to its maximum value (15) before looping backCRTC 1 for which MA is reloaded at each raster line start with R12/R13 instead of MA' as long as VCC=0.

The only exception This is for CRTC 1 with a value major source of 0incompatibility if the programmer does not take care of this discrepancy. In demos and games, which cancels to make a display compatible with all CRTCs, program R12/R13 when VCC!=0. This will then take effect at the current HSYNCnext frame start.

During a VSYNC on CRTCs 0/3/4, if VSYNC Width (R3h) is changed with a value less than the current VSC, then VSC overflows and will continue to count up to its maximum value (15) before looping backand counting up again until it reaches the new value of R3h.

* if this update was done when VCC < R4, then VCC overflows and will continue to count up to its maximum value (127) before looping backand counting up again until it reaches the new value of R4

* on CRTCs 0/1/2, HCC overflows and will count up to its maximum value (255) before looping backand counting up again until it reaches the new value of R0

* on CRTCs 0/1/2, VLC overflows and will count up to its maximum value (31) before looping backand counting up again until it reaches the new value of R9* on CRTCs 3/4, the current line is considered the last one of this CRTC character and VLC changes will reset to 0 on the next line

=== VTAC (C5/C9) overflow ===

* on CRTCs 0/1/2, VTAC overflows and will continue to count up to its maximum value (31) before looping backand counting up again until it reaches the new value of R5* on CRTCs 3/4, the current line is considered the last one of the current frame and vertical adjustment endswill end

== Hitachi Block Diagram Diagrams == === Hitachi === 

=== UMC Block Diagram ===

=== Motorola Block Diagram ===

=== Unused clones ===