Changes
CRTC
,/* HSYNC and VSYNC */
On CPC, HSYNC and VSYNC from the CRTC are passed to the [[Gate Array]] for further modification. See its wiki page.
The HSYNC width value is interpreted differently between CRTCs . On CRTCs 0/1 and , if 0 is programmed no HSYNC is generated. On CRTCs 2/3/4, if 0 is programmed this gives a HSYNC width of 16. CRTCs 1/2 have a fixed VSYNC width value of 16. VSYNC width can be configured with Register 3 on CRTCs 0, /3 and /4.
The bit 0 of port B of the PPI changes to 1 as soon as the VSYNC signal is produced by the CRTC.
