Changes

[[File:8255 Block Diagram.png]]

= Amstrad ASIC PPI =

*The ASIC PPI does not support Group Modes other than Groupe Mode 0.

*On a real PPI chip, when the PPI control register is used (with bit7=1) to configure the ports, all the ports are reset to 0. The ASIC poorly emulates the PPI and does not reset these ports.

= Resources =

* [[Media:PPI M5L8255AP-5.pdf]] PPI Datasheet (Mitsubishi)

* [[VHDL implementation of the 8255 PIO]]

= Links =