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OCR'd page 21
Several of the Machine Pack routines depend on the action of other routines to set up data. To understand this data in full, you need to read 'The Ins and Outs of the AMSTRAD CPC464', which gives full details of the peripheral codes. Only the more essential codes will be defined here.
== Main Reset MAIN RESET ==
At switch—on, or in response to instruction code &C7, location 0000 is entered. At switch-on, lower ROM is enabled, but the ROM routines are later copied to the corresponding RAM locations in this area, so the enable state of the lower ROM is then unimportant. However, the first action of the reset routine is to output &89 to the Video Gate array on I/0 address 7FXX, and this enables lower ROM, disables upper ROM, and also sets up Mode 1. There being no further room in the RST Area the routine jumps to 0580 to continue reset action.
Before discussing MC START PROGRAM, it will be convenient to look at a program which calls it, having first loaded the necessary data:
== MC Boot ProgramBOOT PROGRAM: BD13,05DC ==
On entry to this function, HL must hold the address of a loading routine, which must be designed to return with carry set and the program start address in HL if the load is successful, or with carry clear if the load fails.
HL is popped, and the loading program it defines is entered, using an odd little subroutine that consists solely of the JP (HL) instruction. BC and DE are popped.
If the loader returned with carry set, MC START PROGRAM is entered at 060B. Otherwise, DE and HL are exchanged, putting the address obtained by KL CHOKE OFF into HL, C=B, and MC START PROGRAM is entered at 060E with DE=06E8, the entry address of a routine that reports 'LOAD FAILED'. The previously-selected ROM is entered.
== MC START PROGRAM: BD16,060B ==
If the normal entry to this function, at 060B, is used, DE is set to 0726 (pointing to a Return instruction), but it is also possible to enter at 060E, with DE pointing to a subroutine to be run during the latter part of the START PROGRAM routine. In either case, HL must hold the entry address to be used, and C must hold the number of the ROM to be employed, though the contents of C may be irrelevant if HL points to a RAM area.
Interrupt is disabled, and interrupt mode 1 is selected. The alternative BC, DE and HL registers are brought into action.
An output of 0 to DFXX selects upper ROM 0, and an output of &FF on I/0 address F8FF should reset external peripherals. Workspace in the B100-B8FF range is zeroed, and the Video Gate Array receives an output of &89 on address 7FXX. (Mode 1, enable lower, disable upper.) The normal BC, DE and HL registers are re-selected. XOR A zeroes A and clears carry, and EX AF ,AF' exchanges AF registers. This sets up the initial conditions required by the interrupt system.
The stack pointer is again set to C000, its normal base, and HL, BC and DE are pushed. A series of calls then performs the main initialisation;
* To 0044, copying the RAM routines from RAM, with KL CHOKE OFF following.
* JUMP RESTORE resets the jumpblock entries.
* KM INITIALISE resets the Key Manager.
* SOUND RESET initialises the Sound system.
* TXT INITIALISE initialises the Text VDU.
* GRA INITIALISE initialises the Graphics VDU.
* CAS INITIALISE initialises the Cassette Manager.
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