Changes
/* RAM dump */
My own made program does it with poor serial port, so for dumping all RAM content it takes about 3 hours, and for dumping Amstrad RAM part it is about 15 minutes.
On [[http://www.digilentinc.com/Products/Detail.cfm?Prod=NEXYS2 Diligent NEXYS2 official page]], you can download a "Onboard Memory controller reference design" that contains explanation and VHDL source code about dumping on RAM/ROM of NEXYS2 directly from PC (usb port). I didn't tested this yet, but it is certainly a nicer approach :P
==== FPGA internal RAM size ====