Changes
/* Write Mask */
So you need to know when each mask register is used and you need to understand the logical->physical VRAM mapping.
===== Write Mask in P1 mode =====
* Document states "In P1 mode, writing is prohibited on the side not specified as the transfer destination. (Layer "A":R#46, Layer "B":R#47)". I haven't discovered what this actually means yet.
===== Write Mask in bitmap and standby modes =====
