Changes
/* Reset */
* VRAM read/write via registers, 0,1,2 and 3,4,5 and port 0 use *logical* addresses and not physical addresses. Writing in one mode, and then reading back in another can yield different data because the addresses are translated from physical to logical based on the mode.
=== TP (LOP) ===
* Testing indicates TP operates on the data that will be written (SC) and happens *before* write mask. DC is read from physical VRAM. WC is the result of LOP on SC and DC and is the data that will be written. WC is the data that is masked using the write mask.
=== Write Mask ===
* R46 (Write mask) in bitmap and standby modes is used when writing to physical VRAM0.
* R47 (Write mask) in bitmap and standby modes is used when writing to physical VRAM1.
* Testing indicates write mask takes effect just before writing.
* In bitmap and standby modes this means even logical vram addresses which map to VRAM0 use R46 and odd logical vram address which map to VRAM1 use R47. So to know which mask is used when you need to understand the logical->physical vram mapping.
=== Reset ===
