Changes
V9990
,/* PSET */
* When DIX=0, then both source and destination vram addresses are incremented. When DIX=1, then both source and destination vram addresses are decremented.
* I can't currently see what DIY does in respect of BMLL.
=== SRCH ===
* When searching sx and sy are masked before use. The resulting "found" x position is based on the unmasked value. i.e. if a matching pixel is at 30, and you specify x>256, then the match is reported to be found at 256+30.
* When searching in reverse, if no match is found a X coordinate of 0x07ff will be reported. The "match" flag will not be set as expected.
* When searching forwards, if no match is found then a multiple of the width is reported depending on sx. If sx<width then width is reported, if width<sx<width*2 then width*2 is reported etc. The "match" flag will not be set as expected.
=== BMXL ===
* When the vram address is calculated from dx and dy, dx and dy are masked before use.
This means that transfer wraps within the same line and column. i.e. if drawing in reverse and overlapping x=0, then pixels will wrap to 256-x on the same line and if overlapping x=256 then pixels will wrap to 0.
=== PSET ===