Changes
/* Technical */
NOTE: The addresses to the RAM are also scrambled/remapped. See the schematic.
NOTE: It seems the RAM can only be accessed after the red button has been pressed.
The ROM is made visible by pressing the red button which causes an NMI and execution starts at 0066. The ROM is visible at 0000-1fff with a mirror at 2000-ffff. The ROM overrides the internal CPC OS ROM and also disables the RAM where it is mapped (i.e. RAM in the range 0000-3fff is disabled). Therefore writing to RAM under the ROM is not possible.
instruction. It uses this to transition in and out of the ROM to read the font from the BASIC ROM.
The device seems to listen listens to writes to GA's rom/ram paging I/O portwhen it's not enabled (i.e. when the ROM has not been paged in). It looks for the address with:
0xxxxxxxxxxxxxxxxx with bit 7 and 6 of the data as 10xxxxxx.
The reason needs to be confirmed - but it seems to be similar to port FExx operation, perhaps it indirectly detects the ROM state in this wayby pre-configuring the address.
The device calls 2016 to return back to the running program. This is a RET in the rom repeatmirror.
== Manual ==
