Changes
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File:CPC6512 ct magazin pcb.jpg|PCB
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'''Component List'''
16x 41256 (256Kx1 DRAM) ;replacing the CPC6128's 16 built-in 64Kx1 DRAMs
1x PAL 16L8 ;replacing the CPC6128's built-in PAL
1x 74LS38 ;Quad 2-input NAND, OC
1x 74LS273 ;8bit latch, of which only 5bit are used here
1x 2200 Ohm resistor ;pull-up for OC output
1x 470 Ohm resistor ;pull-up for OC output
1x 47 Ohm resistor ;purpose unknown (noise related? shortcut protection?)
== Compatibility Problems ==
* RAMDIS is not supported, not a problem in most cases, but won't work with some special types of expansion hardware, like [[Multiface II]].
* The expansion seems to have been designed independently of [[Standard Memory Expansions]] like the dk'tronics one. So, there is no (intended) compatibility. However, both c't and dk'tronics are designed around the CPC6128 banking mechanism, so they do work similar in some ways. Namely, both can map expansion banks to 4000h..7FFFh, but there are several differences:
** For the mapping to 4000h..7FFFh, dk'tronics uses values CCh..CFh, D4h..C7h, DCh..DFh, ... FCh..FFh whilst c't uses values C8h..DFh. Some of these values do overlap, resulting in some (unintended) semi-compatibility, but there's still one big difference: along with the above values, dk'tronics maps bank 3 to C000h..FFFFh, whilst c't maps bank 7 to that region.
== Missing Info Memory Configurations ==
D7D6 D0 D3 D4 D1 D2 NCAS A15 A14 GND ;pin 1..10 CPU A15S AMUX MUX LCLK CAS1 CAS0 IOWR A14S VCC ;pin 11..20 IF (VCC) /LCLK= D7D6 * There seems to be no hardware based "Video RAM" support /A15 * /IOWR ;load external latch on OUT [7Fxxh],C0h..FFh IF (VCC) /CAS0= /NCAS * /D4 + ;bank bit4=0, select bank 0..15 (CPU and CRTC) /CAS0= /NCAS * A15 + /CAS0= /NCAS * /A14 + /CAS0= /NCAS * CPU IF (VCC) /CAS1= /NCAS * D4 * /A15 * A14 * /CPU ;bank bit4=1, select bank 16..31 (CPU at all4000h. However.7FFFh only) IF (VCC) /A14S= /A14 + ;bank bit0 /D0 * D2 * /A15 + /D0 * D3 * /A15 + /D0 * D4 * /A15 IF (VCC) /A15S= /A14 * /A15 + ;bank bit1 /D1 * /A15 + /D4 * /D3 * /D2 * /D0 * /A15 + /D4 * /D3 * /D2 * /D1 * /A15 IF (VCC) /AMUX= /D0 * D1 * /D2 * /D3 * /D4 * /CPU * /MUX + A15 * A14 * /D2 * D0 * /CPU * /MUX + A15 * A14 * /D2 * D1 * /CPU * /MUX + A15 * A14 * D3 * /CPU * /MUX + A15 * A14 * D4 * /CPU * /MUX + /A15 * A14 * D2 * /CPU * /MUX + ;bank bit2 /A15 * A14 * D3 * /CPU * MUX ;bank bit3 IF (GND) /MUX = /MUX ;dummy (do not output anything on this pin) IF (GND) /IOWR=/IOWR ;dummy (do not output anything on this pin) '''Note:''' For VRAM access, therebank bits 2,3,4 are forced to zero (by above formulas), bank bit 0,1 are coming from the CRTC, passed directly to IC109 (without going through the PAL), so, the RAM banking affects only the CPU's some unspectacular software based memory accesses, not the CRTC's video memory accesses. Some notes on the syntax:* The first two lines assign the pin-outs. Observe that leading "/" slashes are omitted here. For example included , "/CPU" (in schematic) becomes "CPU" (in source code). Accordingly "/CPU" (in source code) would be double-negated "//CPU" aka "CPU" (in schematic).* The "IF (condition) signal=" part means that copies expansion RAM "signal" becomes an output when condition is true. In the above source code, condition is always true (VCC), or, for the last 2 lines, always false (GND).* The "*" and "+" operators are meaning "* = AND", "+ = OR". The idea behind that confusing syntax was to VRAM via LDIR opcodemake it "easier" to learn for people who are trained only in basic maths (the formulas do also work when treating *=multiply, and +=plus. For example: 1+0+1+1 = 3 = nonzero = true).* There must be some priority ordering in the formulas: Either * before +, or operations inside of a line before merging the results of the separate lines (in above examples, both ordering methods do work).
== Scanned Article / Schematics ==
* [[Media:CPC6512 ct magazin part 1.pdf]] - c't issue 10/1987 - RAM Expansion Schematic* [[Media:CPC6512 ct magazin part 2.pdf]] - c't issue 11/1987 - RAM Disc driverfor CP/M Plus Original names of the articles are: '''Aus David wird Goliath: 512 KB RAM für Schneider CPC''' (part 1), and '''Byte-Hirte: RAM-Disk-Treiber für des CPCs 512 Kbyte''' (part 2). Both articles are written by Gabor Herr and Hubert Schröer.
== Related hardware modifications ==
* [http[CPC_6320_/_CPC_6512_-_internal_320K_/_512K_for_CPC_6128|CPC 6320 / CPC 6512 (by eto) - similar logic, but fully standards compatible]]* [https://cpcwiki.eu/forum/index.php/topic,662.msg7113.html#msg7113 Bank Swapper by Khany/Cherry-T] (less complex: bank-exchanging toggle, no memory expansion; 1993)
* [[CPC4MB| CPC4MB memory upgrade by Yarek]] (more advanced; 2005/2006)