Changes

! rowspan=2|Mnemonic !! rowspan=2|Combines !! colspan=10|Addressing Modes !! colspan=87|Flags !! rowspan=2|Operation !! rowspan=2|Description

! ''No arg'' !! #$nn !! $nnnn !! $nnnn,X !! $nnnn,Y !! $nn !! $nn,X !! $nn,Y !! ($nn,X) !! ($nn),Y !! N !! V !! - !! B !! D !! I !! Z !! C

| ANC (ANC2) || AND + ASL/ROL || || 0B, 2B (2) || || || || || || || || || N || - || - || - || - || - || Z || C || A ∧ M → A, NF → CF || "AND" Memory with Accumulator then Move Negative Flag to Carry Flag

| ARR || AND + ROR || || 6B (2) || || || || || || || || || N || V || - || - || - || - || Z || C || (A ∧ M) / 2 → A || "AND" Accumulator then Rotate Right

| ASR (ALR) || AND + LSR || || 4B (2) || || || || || || || || || 0 || - || - || - || - || - || Z || C || (A ∧ M) / 2 → A || "AND" then Logical Shift Right

| DCP (DCM) || DEC + CMP || || || CF (6) || DF (7) || DB (7) || C7 (5) || D7 (6) || || C3 (8) || D3 (8) || N || - || - || - || - || - || Z || C || M - 1 → M, A - M || Decrement Memory By One then Compare with Accumulator

| ISC (ISB, INS) || INC + SBC || || || EF (6) || FF (7) || FB (7) || E7 (5) || F7 (6) || || E3 (8) || F3 (8) || N || V || - || - || - || - || Z || C || M + 1 → M, A - M → A || Increment Memory By One then SBC then Subtract Memory from Accumulator with Borrow

|| || || || || || || || || || - || - || - || - || - || - || - || - || Stop execution || Halt the CPU

| LAS (LAR) || STA/TXS + LDA/STX || || || || || BB (4+p) || || || || || || N || - || - || - || - || - || Z || - || M ∧ S → A, X, S || "AND" Memory with Stack Pointer

| LAX (LXA) || LDA + LDX || || style="color: #CC0000;"|'''AB''' (2) || AF (4) || || BF (4+p) || A7 (3) || || B7 (4) || A3 (6) || B3 (5+p) || N || - || - || - || - || - || Z || - || M → A, X || Load Accumulator and Index Register X From Memory

|| || || || - || - || - || - || - || - || - || - || No operation || No Operation

| RLA || ROL + AND || || || 2F (6) || 3F (7) || 3B (7) || 27 (5) || 37 (6) || || 23 (8) || 33 (8) || N || - || - || - || - || - || Z || C || CF ← /M7...M0/ ← CF, A ∧ M → A || Rotate Left then "AND" with Accumulator

| RRA || ROR + ADC || || || 6F (6) || 7F (7) || 7B (7) || 67 (5) || 77 (6) || || 63 (8) || 73 (8) || N || V || - || - || - || - || Z || C || CF → /M7...M0/ → CF, A + M + CF → A || Rotate Right and Add Memory to Accumulator

| SAX (AXS, AAX) || STA + STX || || || 8F (4) || || || 87 (3) || || 97 (4) || 83 (6) || || - || - || - || - || - || - || - || - || A ∧ X → M || Store Accumulator "AND" Index Register X in Memory

| SBC (USBC) || SBC + NOP || || EB (2) || || || || || || || || || N || V || - || - || - || - || Z || C || A - M - ~CF → A || Subtract Memory from Accumulator with Borrow

| SBX (AXS, SAX) || CMP + DEX || || CB (2) || || || || || || || || || N || - || - || - || - || - || Z || C || (A ∧ X) - M → X || Subtract Memory from Accumulator "AND" Index Register X

| SHA (AHX, AXA) || STA/STX/STY || || || || || style="color: #CC0000;"|'''9F''' (5) || || || || || style="color: #CC0000;"|'''93''' (6) || - || - || - || - || - || - || - || - || A ∧ X ∧ V → M || Store Accumulator "AND" Index Register X "AND" Value

| SHS (TAS, XAS) || STA/TXS + LDA/TSX || || || || || style="color: #CC0000;"|'''9B''' (5) || || || || || || - || - || - || - || - || - || - || - || A ∧ X → S, S ∧ (H + 1) → M || Transfer Accumulator "AND" Index Register X to Stack Pointer then Store Stack Pointer "AND" Hi-Byte In Memory

| SHX (SXA, XAS) || STA/STX/STY || || || || || style="color: #CC0000;"|'''9E''' (5) || || || || || || - || - || - || - || - || - || - || - || X ∧ (H + 1) → M || Store Index Register X "AND" Value

| SHY (SYA, SAY) || STA/STX/STY || || || || style="color: #CC0000;"|'''9C''' (5) || || || || || || || - || - || - || - || - || - || - || - || Y ∧ (H + 1) → M || Store Index Register Y "AND" Value

| SLO (ASO) || ASL + ORA || || || 0F (6) || 1F (7) || 1B (7) || 07 (5) || 17 (6) || || 03 (8) || 13 (8) || N || - || - || - || - || - || Z || C || M * 2 → M, A ∨ M → A || Arithmetic Shift Left then "OR" Memory with Accumulator

| SRE (LSE) || LSR + EOR || || || 4F (6) || 5F (7) || 5B (7) || 47 (5) || 57 (6) || || 43 (8) || 53 (8) || N || - || - || - || - || - || Z || C || M / 2 → M, A ⊻ M → A || Logical Shift Right then "Exclusive OR" Memory with Accumulator

| XAA (ANE) || TXA + AND || || style="color: #CC0000;"|'''8B''' (2) || || || || || || || || || N || - || - || - || - || - || Z || - || (A ∨ V) ∧ X ∧ M → A || Non-deterministic Operation of Accumulator, Index Register X, Memory and Bus Contents