Difference between revisions of "SYMBiFACE II:IDE registers"

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|'''#FD09''' || Error Register || Features Register/''(Write Precomp Reg.)''
 
|'''#FD09''' || Error Register || Features Register/''(Write Precomp Reg.)''
 
|-
 
|-
|'''#FD0A''' || Sector Count || Sector Count
+
|'''#FD0A''' || Sector Count (0=256) || Sector Count (0=256)
 
|-
 
|-
|'''#FD0B''' || Sector Number || Sector Number
+
|'''#FD0B''' || Sector Number for CHS or LBA bits 0-7 || Sector Number for CHS or LBA bits 0-7
 
|-
 
|-
|'''#FD0C''' || Cylinder Low || Cylinder Low
+
|'''#FD0C''' || Cylinder Low for CHS or LBA bits 8-15 || Cylinder Low for CHS or LBA bits 8-15
 
|-
 
|-
|'''#FD0D''' || Cylinder High || Cylinder High
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|'''#FD0D''' || Cylinder High for CHS or LBA bits 16-23 || Cylinder High for CHS or LBA bits 16-23
 
|-
 
|-
|'''#FD0E''' || Device/Head Register || Device/Head Register
+
|'''#FD0E''' || Device/Head Register (Bit 6=0 CHS, Bit 6=1 LBA) (Bit 4 = 0 Master, Bit 4 = 1 Slave) (Bits 3..0 Head for CHS or LBA bits 24-27) || Device/Head Register (Bit 6=0 CHS, Bit 6=1 LBA) (Bit 4 = 0 Master, Bit 4 = 1 Slave) (Bits 3..0 Head for CHS or LBA bits 24-27)
 
|-
 
|-
 
|'''#FD0F''' || Status Register || Command Register
 
|'''#FD0F''' || Status Register || Command Register

Latest revision as of 04:52, 15 January 2018

The Symbiface 2 operates the ATA/IDE device in 16-bit data transfer mode. 16-bits of data is buffered at a time within the Symbiface 2 and read/written via the Data port I/O address 8 bits at a time. The device was designed when devices didn't support ATA CFA command set and 8-bit PIO data transfer so this is why it buffers 16-bit of data. (16-bits is the "native" data transfer of an ATA device).

The I/O ports operate in a "pass-through" like mode where the registers directly reflect those of the connected ATA device.

The X-Mass is a more modern ATA/IDE device which is compatible with the Symbiface 2 IDE registers and uses the same I/O ports.

This is the documentation about the IDE registers of the SYMBiFACE II expansion card.

Port Read Write
#FD06 Alternate Status Digital Output
#FD07 Drive Address (Not Used)
#FD08 Data Register Data Register
#FD09 Error Register Features Register/(Write Precomp Reg.)
#FD0A Sector Count (0=256) Sector Count (0=256)
#FD0B Sector Number for CHS or LBA bits 0-7 Sector Number for CHS or LBA bits 0-7
#FD0C Cylinder Low for CHS or LBA bits 8-15 Cylinder Low for CHS or LBA bits 8-15
#FD0D Cylinder High for CHS or LBA bits 16-23 Cylinder High for CHS or LBA bits 16-23
#FD0E Device/Head Register (Bit 6=0 CHS, Bit 6=1 LBA) (Bit 4 = 0 Master, Bit 4 = 1 Slave) (Bits 3..0 Head for CHS or LBA bits 24-27) Device/Head Register (Bit 6=0 CHS, Bit 6=1 LBA) (Bit 4 = 0 Master, Bit 4 = 1 Slave) (Bits 3..0 Head for CHS or LBA bits 24-27)
#FD0F Status Register Command Register

See also