Difference between revisions of "Z80 PIO"
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| − | + | The Zilog [[Z80 PIO]] chip (aka Z84C20) is a '''Dual 8bit''' I/O Port (not to be confused with the '''Triple 8bit''' [[8255 PPI chip]], which is sometimes referred to as PIO, too). | |
| + | |||
| + | == Register Addressing == | ||
| + | |||
| + | The chip has B/A (Port B/A Select) and C/D (Control/Data Select) pins, which may be connected to the CPUs A0 and A1 pins (or vice-versa, A1 and A0) (or other pins like A3 and A4). Anyways, no matter how the addressing is done: | ||
| + | |||
| + | There are 4 registers - 2 Data registers, and 2 Control registers. | ||
| + | |||
| + | == Data Registers A and B == | ||
| + | |||
| + | Data direction can be configured in the corresponding control register. Depending on the direction, the data bits are inputs or outputs with following meaning: | ||
| + | 7-0 Data (0=Low, 1=High) | ||
| + | Aside from the 8 data lines, each port additionaly supports automatic /STROBE and READY handshaking signals (whereas, unlike as in printer ports, STROBE can act as an input, not an output), the handshaking stuff isn't used in Mode3. | ||
| + | |||
| + | == Control Registers A and B == | ||
| + | |||
| + | When D0=0: | ||
| + | 7-1 Interrupt Vectors Bit7-1 (Vector Bit0 is fixed = zero) | ||
| + | 0 Must be 00h | ||
| + | When D0..D3=03h: | ||
| + | 7 Interrupt Enable (1=Enable) (same as when D0..D3=0Fh) | ||
| + | 6-4 Not used (should be zero) | ||
| + | 0-3 Must be 03h | ||
| + | When D0..D3=07h: | ||
| + | 7 Interrupt Enable (1=Enable) | ||
| + | 6 Interrupt AND/OR (0=OR, 1=AND) ;\ | ||
| + | 5 Interrupt High Low (1=High) ; used in Mode3 only | ||
| + | 4 Interrupt Mask Follows ;/ ;<--- also ACK interrupt? | ||
| + | 0-3 Must be 07h | ||
| + | When D0..D3=0Fh: | ||
| + | 7-6 Mode (0=out, 1=in, 2=bidirectional,3=control) (mode2 on PortA only) | ||
| + | 5-4 Not used (should be zero) | ||
| + | 0-3 Must be 0Fh | ||
| + | After Mode3 (control mode) was set, then next control write is: | ||
| + | 0-7 Direction bits, separately for each pin (0=out, 1=in) | ||
| + | After InterruptMaskFollows was set (in Mode3 only?), then next write is: | ||
| + | 0-7 Select bits to be monitored (in OR mode: 0=Select) | ||
| + | |||
| + | == Usage in CPC == | ||
| + | |||
| + | A [[Z80 PIO]] is used by the following CPC hardware expansions: | ||
| + | |||
| + | * [[ACU Real Time Clock (DIY)]] | ||
| + | * [[Dk'tronics Real Time Clock]] | ||
| + | * [[PDS development system]] | ||
| + | |||
| + | == Datasheet == | ||
| + | |||
| + | * [[Media:Z80pio z84c20.pdf]] - Zilog Z80 PIO Datasheet | ||
| + | |||
| + | |||
| + | [[Category:Programming]][[Category:CPC Internal Components]][[Category:Electronic Component]] | ||
Latest revision as of 17:27, 19 December 2010
The Zilog Z80 PIO chip (aka Z84C20) is a Dual 8bit I/O Port (not to be confused with the Triple 8bit 8255 PPI chip, which is sometimes referred to as PIO, too).
Contents
Register Addressing
The chip has B/A (Port B/A Select) and C/D (Control/Data Select) pins, which may be connected to the CPUs A0 and A1 pins (or vice-versa, A1 and A0) (or other pins like A3 and A4). Anyways, no matter how the addressing is done:
There are 4 registers - 2 Data registers, and 2 Control registers.
Data Registers A and B
Data direction can be configured in the corresponding control register. Depending on the direction, the data bits are inputs or outputs with following meaning:
7-0 Data (0=Low, 1=High)
Aside from the 8 data lines, each port additionaly supports automatic /STROBE and READY handshaking signals (whereas, unlike as in printer ports, STROBE can act as an input, not an output), the handshaking stuff isn't used in Mode3.
Control Registers A and B
When D0=0:
7-1 Interrupt Vectors Bit7-1 (Vector Bit0 is fixed = zero) 0 Must be 00h
When D0..D3=03h:
7 Interrupt Enable (1=Enable) (same as when D0..D3=0Fh) 6-4 Not used (should be zero) 0-3 Must be 03h
When D0..D3=07h:
7 Interrupt Enable (1=Enable) 6 Interrupt AND/OR (0=OR, 1=AND) ;\ 5 Interrupt High Low (1=High) ; used in Mode3 only 4 Interrupt Mask Follows ;/ ;<--- also ACK interrupt? 0-3 Must be 07h
When D0..D3=0Fh:
7-6 Mode (0=out, 1=in, 2=bidirectional,3=control) (mode2 on PortA only) 5-4 Not used (should be zero) 0-3 Must be 0Fh
After Mode3 (control mode) was set, then next control write is:
0-7 Direction bits, separately for each pin (0=out, 1=in)
After InterruptMaskFollows was set (in Mode3 only?), then next write is:
0-7 Select bits to be monitored (in OR mode: 0=Select)
Usage in CPC
A Z80 PIO is used by the following CPC hardware expansions:
Datasheet
- Media:Z80pio z84c20.pdf - Zilog Z80 PIO Datasheet
