Changes
This 256x4bit PROM assists Gate Array 3 (RAM banking)
Inputs: A0..A1 CPU A14..A15 ;-the addressed 16K memory block A2..A5,A7 M0..M4 A6 MAPMOD Outputs: D0..D3 MAP14..MAP17
Addresses used when MAPMOD=0:
This 256x4bit PROM assists Gate Array 2 (RAM/ROM enable)
Inputs: A0 PROM0 ;\from gate array (but translated via COLDAT, A1 PROM1 ;/ not the original value written by the CPU) A2 CPU A14 ;\the addressed 16K memory block A3 CPU A15 ;/ A4 CPU A0 A5 /MREQ A6 /RD A7 RAMDIS ;-RAMDIS pin on expansion port Outputs: D0 BUFFER0 ? D1 BUFFER1 ? D2 /ROMEN ;ROM enable (note: ROMDIS is handled elsewhere) D3 /RAMEN ;RAM enable
Page: 0000h 4000h 8000h C000h
This 2Kx8bit EPROM is used for Video and Keyboard translation.
Inputs:
A0..A8 9bit counter (clocked by 3CY aka 1M div sth, reset by HY aka VSYNC)
A9 clocked by 1M div sth
A10 not used (wired to GND)
Outputs:
D0 video SYNC* (hsync+vsync, passed to monitor SYNC)
D1 video HY* (vsync, passed to ppi)
