Changes
/* Allophone Lengths */
[[File:SP0256 PWM Output.png]]
== LRQ / SBY Timings ==
This table shows timings when sending an allophone number to the chip (by sending ALD=LOW) while the chip was in standby mode:
Timing min avg max
ALDn falling to LDQn rising 180ns 187ns 190ns
ALDn falling to SBY falling 200ns 204ns 210ns
LRQn high duration 15940ns 24203ns 41600ns
SBY low duration (....allophone length....)
* From the Z80 perspective, the stuff with 180..210ns timings reacts immediately.
* However, the LRQ high duration of 15..41us is visible to the Z80 (though well programmed / existing Z80 software should not rely on the presence of this delay).
* Theoretically, in standby state, the chip could process incoming data immediately, so LRQ wouldn't need to go HIGH at all. The fact that it does go HIGH may have two reasons: First, the chip may be unable to react immediately. Second, it may be done intentionally, for use with edge-triggered IRQ or DMA hardware.
== Allophone Lengths ==
