Changes
/* Bus arbitration */
Every microsecond:
* The CRTC generates a memory address using it's MA and RA signal outputs. See the [[CRTC]] wiki page to know how the motherboard wiring transforms these signals into the Video Memory Address (VMA).
* The Gate Array fetches 2 bytes for each address. /CPU_ADDR is a 1MHz signal. So these 2 bytes are fetched sequentially. They are not interleaved with Z80 access. These addresses bytes are fetched even when the border is on as this is required for DRAM refresh.
* The video hardware is given priority so that the display is not disrupted.
