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ASIC

No change in size, 6 July
/* DMA sound channels */
These instructions are encoded in little-endian (LSB byte first). They must be located in Base 64k RAM and aligned to word boundary (the address of first byte must be even).
&4xxx instruction codes are partially decoded by the DMA controller. For example, the instruction code &CFCF CFCFh is equivalent to &40014001h.
Each DMA channel fetch one 16-bit instruction during horizontal retrace time. Once the 3 instructions have been captured, they are then executed sequentially.
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