Changes
/* Registers */
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 0 || rowspan="2" | Gate Array function "Pen Selection"PENR register
|-
| 6 || 0
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 0 || rowspan="2" | Gate Array function "Pen Selection"PENR register
|-
| 6 || 0
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 0 || rowspan="2" | Gate Array function "Colour selection"INK register
|-
| 6 || 1
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 1 || rowspan="2" | Gate Array functionRMR register
|-
| 6 || 0
| 0 || x
|}
<br>
=== Register RMR2 (ASIC & Advanced ROM mapping) ===
This register exists only in Plus or GX4000, and is only accessible when the ASIC is unlocked.
{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 1 || rowspan="3" | Gate Array RMR2 register
|-
| 6 || 0
|-
| 5 || 1
|-
| 4 || x || rowspan="2" |Lower ROM address and ASIC I/O page mode
|-
| 3 || x
|-
| 2 || x || rowspan="3" | Physical lower ROM number to connect (0..7)
|-
| 1 || x
|-
| 0 || x
|}
The lower ROM address and ASIC I/O page modes are:
-Mode- ROM address ASIC I/O Page
0 0 &0000-&3FFF Disabled
0 1 &4000-&7FFF Disabled
1 0 &8000-&BFFF Disabled
1 1 &0000-&3FFF &4000-&7fff
The physicial lower ROMs are also accessible as logical upper ROMs with the RMR register.
<br>
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 1 || rowspan="2" | Gate Array function 3MMR register
|-
| 6 || 1
|-
| 5 || b x || rowspan="3" |64K bank number (0..7); always 0 on an unexpanded CPC6128, 0-7 on [[Standard Memory Expansions]]
|-
| 4 || bx
|-
| 3 || bx
|-
| 2 || x || rowspan="3" | RAM Config (0..7)
