Changes
CRTC
,/* CRTC counter differences */
== CRTC counter differences ==
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=== HSC (C3l) overflow ===
During an HSYNC, if HSYNC Width (R3l) is changed with a value less than the current HSC, then HSC overflows and will continue to count up to its maximum value (15) before looping back.
The only exception is for CRTC 1 with a value of 0, which cancels the current HSYNC.
=== VCC (C4) overflow ===
