Changes
/* CSYNC */
== CSYNC ==
On CPC, the HSYNC and VSYNC signals are received from the [[CRTC]]. These signals are then converted modified and merged by the Gate Array into a single CSYNC signal that will be sent to the display. When CRTC HSYNC is active, the Gate-Array outputs the palette colour black. If the HSYNC is set to 14 characters then black will be output for 14µs. The HSYNC is modified before being sent to the monitor. It is delayed by 2µs and will last only a maximum of 4µs. For example, if CRTC R2=46, and CRTC HSYNC width is 14 then monitor hsync starts at 48 and lasts only until 51 included. The VSYNC is also modified before being sent to the monitor. It happens two lines* after the VSYNC from the CRTC and stay two lines (same cut rule if VSYNC is lower than 4). PAL (50Hz) does need two lines VSYNC_width, and 4us HSYNC_width.
The Gate Array uses 2 internal counters to create its CSYNC signal:
* H06 which counts the number of CRTC characters processed during an HSYNC
* V26 which counts the number of HSYNCs occuring during a VSYNC
On a CPC monitor, the CSYNC is rendered in "absolute black". It is darker than the palette colour black output by the Gate Array.
== Controlling the Gate Array ==
