Changes
CRTC
,/* Overflow during HSYNC */
The HSYNC width value is interpreted differently between CRTCs. On CRTCs 0/1, if 0 is programmed no HSYNC is generated. On CRTCs 2/3/4, if 0 is programmed this gives a HSYNC width of 16.
CRTCs 1/2 have a fixed VSYNC width value of 16. VSYNC width can be configured with Register 3 on CRTCs 0/3/4. If 0 is programmed this gives 16 lines of VSYNC.
* See the document "Extra CPC Plus Hardware Information" for more details.
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=== Overflow during HSYNC ===
During an HSYNC, if HSYNC Width (R3l) is changed with a value less than the current HSC, then HSC is overflowing. The only exception is for CRTC 1 with a value of 0, which cancels the current HSYNC.
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=== Overflow during Vertical Adjustment ===
During vertical adjustment, if Vertical Total Adjust (R5) is changed with a value less than the current VTAC, then:
* on CRTCs 0/1/2, VTAC overflows and continues to count up to 0 to reach new R5 value
* on CRTC 3/4, the line is considered the last and additional management ends
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