View source for Arduino Hands-On: Working with the AT24C256 Storage Module

Experiment: AT24C256 I2C Interface EEPROM Storage Module
The [https://www.unikeyic.com/search?keyword=AT24C256 AT24C256] is a 256Kbit serial EEPROM from ATMEL, known for its electrically erasable and programmable read-only memory capabilities. It is available in an 8-pin dual in-line package, offering a compact structure with substantial storage capacity. This EEPROM allows multiple ICs to be connected in parallel on a 2-wire bus, making it particularly suitable for data acquisition systems that require high-capacity storage. The AT24C256 is packaged in the SOP-8 format. You can find more information about this component on Unikeyic's website
Chip Specifications
The chip operates at three different voltages:

5.0V (VCC=4.5V～5.5V)
2.7V (VCC=2.7V～5.5V)
1.8V (VCC=1.8V～3.6V)

Features:
Internally organized as 32k×8 memory units
2-wire serial interface
Schmitt trigger with filtered input to suppress noise
Bidirectional data transfer protocol
Hardware write protection pin and software data protection function
Supports 64-byte page write mode
A0, A1: Address selection input pins. In a serial bus structure, up to 4 AT24C256 ICs can be connected. A0 and A1 are used to differentiate between each IC. A0 and A1 are grounded when not in use.
SCL:.Data on the SDA line is written to the memory at the rising edge of the clock, and data is read from the memory to the SDA line at the falling edge.
SDA: Bidirectional serial data input/output port. Used for data exchange between the memory and microcontroller.
WP:The write protection input is used to control the write operations of the memory. When this pin is connected to ground, write operations are enabled. Conversely, connecting it to VCC disables all write operations to the memory. If the pin is left unconnected, it is internally pulled down to ground, allowing write operationsVCC: Power supply.
GND: Ground.
NC: Not connected.
Operating Principle of AT24C256
The AT24C256 has 512 pages, with each page containing 64 bytes. The address for any unit is 15 bits long, ranging from 0000H to 7FFFH.

Chip Operating States:
Clock and Data Transfer
Typically, the SDA line is pulled high by external devices. Data transmission occurs when the SDA line changes state while the SCL line is low, signaling the start of data transfer. Conversely, if the SDA line changes while the SCL line is high, it indicates a change in status.
Start State (START)
When SCL is high and SDA transitions from high to low, it signifies the start of data transmission. This state must occur before all commands.

Stop State (STOP)
When SCL is high and SDA transitions from low to high, it indicates the end of data transmission.

Acknowledge State (ACK)
All addresses and data are transmitted to or read from the memory serially in 8-bit segments. During the 9th clock cycle, the memory sends an acknowledgment by pulling the SDA line low, indicating it has successfully received the 8 bits of data. Refer to the bus protocol diagram for more details.
AT24C256 I2C Interface EEPROM Storage Module
1.On-board imported AT24C256 chip;
2.On-board pull-up resistors required for I2C communication;
3.All pins are led out and labeled;
4.PCB board size: 1.9(CM) x 1.1(CM)
Tag:AT24C256; Storage Module;electronic components
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