Internal FPGA RAM (VRAM)
+8
palette_D and aZRaEL's counters derailment
+1
ZX-Uno - Core Developer's Notes
+1,066
From Xilinx to Altera schematics
+1
Why I destroyed the PPL
+9
ZX-Uno - Core Developer's Notes
+1
Why I destroyed the PPL
+26
Why I destroyed the PPL
+1
MiST-board - Core Developer's Notes
+2,428
VIDEO: SAMSUNG 16/9 tests
+367
MiST-board special features
+152
GA: WAIT_n generator
+9
MiST-board special features
+91
PPI
+27
Z80
+46
GA
VGA
+1
Effort done
+35
GA: interrupts, VSYNC
+34
VGA
+105
Effort done
+397
MiST-board special features
+11,729
Effort done
+4
Effort done
-11,864
Others tricks
+51
TODO : an OSD option to enable scan-doubler
On ZX-Uno FPGAmstrad version
+2
On ZX-Uno FPGAmstrad version
-77
Source code
+122
simple and over-documented
+33
simple and over-documented
-384
simple and over-documented
+2
Why ZX-Uno platform
+32
Why MiST-board final platform
+1,538
On ZX-Uno FPGAmstrad version
+45
Tests done
+479
Last news about this project
+35
Last news about this project
Last news about this project
+406
TODO : Scanline during monochrome + scandb50Hz modes
+15
DONE : Monochrome option
+16
DONE : Monochrome option
+316
DONE : Monochrome option
-1
soleil vert demo on r005.8.16c29 using scandb50Hz VGA output
DONE : Monochrome option
+59